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authorcdevadas <cdevadas@amd.com>2020-01-10 22:23:27 +0530
committercdevadas <cdevadas@amd.com>2020-01-15 15:18:16 +0530
commit0dc6c249bffac9f23a605ce4e42a84341da3ddbd (patch)
tree113cc776987199087010ef82f8fd4728b06d0c8b /clang/test/Sema/array-constraint.c
parent064859bde79ccd221fd5196fd2d889014c5435c4 (diff)
downloadbcm5719-llvm-0dc6c249bffac9f23a605ce4e42a84341da3ddbd.tar.gz
bcm5719-llvm-0dc6c249bffac9f23a605ce4e42a84341da3ddbd.zip
[AMDGPU] Invert the handling of skip insertion.
The current implementation of skip insertion (SIInsertSkip) makes it a mandatory pass required for correctness. Initially, the idea was to have an optional pass. This patch inserts the s_cbranch_execz upfront during SILowerControlFlow to skip over the sections of code when no lanes are active. Later, SIRemoveShortExecBranches removes the skips for short branches, unless there is a sideeffect and the skip branch is really necessary. This new pass will replace the handling of skip insertion in the existing SIInsertSkip Pass. Differential revision: https://reviews.llvm.org/D68092
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