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| author | Coby Tayree <coby.tayree@intel.com> | 2017-12-27 10:01:00 +0000 |
|---|---|---|
| committer | Coby Tayree <coby.tayree@intel.com> | 2017-12-27 10:01:00 +0000 |
| commit | 2268576fa05bb220edc0984c158e9b37f24c1be3 (patch) | |
| tree | 116c5ce8834fa221fb3f19743c5725128d97da56 /clang/test/Preprocessor/x86_target_features.c | |
| parent | f72630bb9b702699f528d7ec4cb576f7481d7c70 (diff) | |
| download | bcm5719-llvm-2268576fa05bb220edc0984c158e9b37f24c1be3.tar.gz bcm5719-llvm-2268576fa05bb220edc0984c158e9b37f24c1be3.zip | |
[x86][icelake][bitalg]
added bitalg feature recognition
added intrinsics support for bitalg instructions
_mm512_popcnt_epi16
_mm512_mask_popcnt_epi16
_mm512_maskz_popcnt_epi16
_mm512_popcnt_epi8
_mm512_mask_popcnt_epi8
_mm512_maskz_popcnt_epi8
_mm512_mask_bitshuffle_epi64_mask
_mm512_bitshuffle_epi64_mask
_mm256_popcnt_epi16
_mm256_mask_popcnt_epi16
_mm256_maskz_popcnt_epi16
_mm128_popcnt_epi16
_mm128_mask_popcnt_epi16
_mm128_maskz_popcnt_epi16
_mm256_popcnt_epi8
_mm256_mask_popcnt_epi8
_mm256_maskz_popcnt_epi8
_mm128_popcnt_epi8
_mm128_mask_popcnt_epi8
_mm128_maskz_popcnt_epi8
_mm256_mask_bitshuffle_epi32_mask
_mm256_bitshuffle_epi32_mask
_mm128_mask_bitshuffle_epi16_mask
_mm128_bitshuffle_epi16_mask
matching a similar work on the backend (D40222)
Differential Revision: https://reviews.llvm.org/D41564
llvm-svn: 321483
Diffstat (limited to 'clang/test/Preprocessor/x86_target_features.c')
| -rw-r--r-- | clang/test/Preprocessor/x86_target_features.c | 22 |
1 files changed, 22 insertions, 0 deletions
diff --git a/clang/test/Preprocessor/x86_target_features.c b/clang/test/Preprocessor/x86_target_features.c index 35817445608..61a57246a58 100644 --- a/clang/test/Preprocessor/x86_target_features.c +++ b/clang/test/Preprocessor/x86_target_features.c @@ -209,11 +209,33 @@ // AVX512VBMI: #define __SSE__ 1 // AVX512VBMI: #define __SSSE3__ 1 +// RUN: %clang -target i386-unknown-unknown -march=atom -mavx512bitalg -x c -E -dM -o - %s | FileCheck -match-full-lines --check-prefix=AVX512BITALG %s + +// AVX512BITALG: #define __AVX2__ 1 +// AVX512BITALG: #define __AVX512BITALG__ 1 +// AVX512BITALG: #define __AVX512BW__ 1 +// AVX512BITALG: #define __AVX512F__ 1 +// AVX512BITALG: #define __AVX__ 1 +// AVX512BITALG: #define __SSE2_MATH__ 1 +// AVX512BITALG: #define __SSE2__ 1 +// AVX512BITALG: #define __SSE3__ 1 +// AVX512BITALG: #define __SSE4_1__ 1 +// AVX512BITALG: #define __SSE4_2__ 1 +// AVX512BITALG: #define __SSE_MATH__ 1 +// AVX512BITALG: #define __SSE__ 1 +// AVX512BITALG: #define __SSSE3__ 1 + + // RUN: %clang -target i386-unknown-unknown -march=atom -mavx512vbmi -mno-avx512bw -x c -E -dM -o - %s | FileCheck -match-full-lines --check-prefix=AVX512VBMINOAVX512BW %s // AVX512VBMINOAVX512BW-NOT: #define __AVX512BW__ 1 // AVX512VBMINOAVX512BW-NOT: #define __AVX512VBMI__ 1 +// RUN: %clang -target i386-unknown-unknown -march=atom -mavx512bitalg -mno-avx512bw -x c -E -dM -o - %s | FileCheck -match-full-lines --check-prefix=AVX512BITALGNOAVX512BW %s + +// AVX512BITALGNOAVX512BW-NOT: #define __AVX512BITALG__ 1 +// AVX512BITALGNOAVX512BW-NOT: #define __AVX512BW__ 1 + // RUN: %clang -target i386-unknown-unknown -march=atom -msse4.2 -x c -E -dM -o - %s | FileCheck -match-full-lines --check-prefix=SSE42POPCNT %s // SSE42POPCNT: #define __POPCNT__ 1 |
