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| author | Coby Tayree <coby.tayree@intel.com> | 2017-12-27 08:37:47 +0000 |
|---|---|---|
| committer | Coby Tayree <coby.tayree@intel.com> | 2017-12-27 08:37:47 +0000 |
| commit | f4811ebc395edb95a8bfedf822f2bb6923f3c658 (patch) | |
| tree | 82cb72e4f8d7e2e3d8bcaf3c44ed2377ab57ea87 /clang/test/Preprocessor/predefined-arch-macros.c | |
| parent | 309b06cb5c6fd779c819a1e4c28b323b46f5e76b (diff) | |
| download | bcm5719-llvm-f4811ebc395edb95a8bfedf822f2bb6923f3c658.tar.gz bcm5719-llvm-f4811ebc395edb95a8bfedf822f2bb6923f3c658.zip | |
[x86][icelake][gfni]
added gfni feature recognition
added intrinsics support for gfni instructions
_mm_gf2p8affineinv_epi64_epi8
_mm_mask_gf2p8affineinv_epi64_epi8
_mm_maskz_gf2p8affineinv_epi64_epi8
_mm256_gf2p8affineinv_epi64_epi8
_mm256_mask_gf2p8affineinv_epi64_epi8
_mm256_maskz_gf2p8affineinv_epi64_epi8
_mm512_gf2p8affineinv_epi64_epi8
_mm512_mask_gf2p8affineinv_epi64_epi8
_mm512_maskz_gf2p8affineinv_epi64_epi8
_mm_gf2p8affine_epi64_epi8
_mm_mask_gf2p8affine_epi64_epi8
_mm_maskz_gf2p8affine_epi64_epi8
_mm256_gf2p8affine_epi64_epi8
_mm256_mask_gf2p8affine_epi64_epi8
_mm256_maskz_gf2p8affine_epi64_epi8
_mm512_gf2p8affine_epi64_epi8
_mm512_mask_gf2p8affine_epi64_epi8
_mm512_maskz_gf2p8affine_epi64_epi8
_mm_gf2p8mul_epi8
_mm_mask_gf2p8mul_epi8
_mm_maskz_gf2p8mul_epi8
_mm256_gf2p8mul_epi8
_mm256_mask_gf2p8mul_epi8
_mm256_maskz_gf2p8mul_epi8
_mm512_gf2p8mul_epi8
_mm512_mask_gf2p8mul_epi8
_mm512_maskz_gf2p8mul_epi8
matching a similar work on the backend (D40373)
Differential Revision: https://reviews.llvm.org/D41582
llvm-svn: 321477
Diffstat (limited to 'clang/test/Preprocessor/predefined-arch-macros.c')
| -rw-r--r-- | clang/test/Preprocessor/predefined-arch-macros.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/clang/test/Preprocessor/predefined-arch-macros.c b/clang/test/Preprocessor/predefined-arch-macros.c index 81b9ad66ff0..5c440901897 100644 --- a/clang/test/Preprocessor/predefined-arch-macros.c +++ b/clang/test/Preprocessor/predefined-arch-macros.c @@ -1063,6 +1063,7 @@ // CHECK_ICL_M32: #define __CLFLUSHOPT__ 1 // CHECK_ICL_M32: #define __F16C__ 1 // CHECK_ICL_M32: #define __FMA__ 1 +// CHECK_ICL_M32: #define __GFNI__ 1 // CHECK_ICL_M32: #define __LZCNT__ 1 // CHECK_ICL_M32: #define __MMX__ 1 // CHECK_ICL_M32: #define __MPX__ 1 @@ -1109,6 +1110,7 @@ // CHECK_ICL_M64: #define __CLFLUSHOPT__ 1 // CHECK_ICL_M64: #define __F16C__ 1 // CHECK_ICL_M64: #define __FMA__ 1 +// CHECK_ICL_M64: #define __GFNI__ 1 // CHECK_ICL_M64: #define __LZCNT__ 1 // CHECK_ICL_M64: #define __MMX__ 1 // CHECK_ICL_M64: #define __MPX__ 1 |
