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| author | Yunzhong Gao <Yunzhong_Gao@playstation.sony.com> | 2013-10-16 19:07:02 +0000 |
|---|---|---|
| committer | Yunzhong Gao <Yunzhong_Gao@playstation.sony.com> | 2013-10-16 19:07:02 +0000 |
| commit | 6108936fa633f32309f4bc7fd52544a263924bbf (patch) | |
| tree | 89690c33d64fcd393e42786832d6795a0b7bda08 /clang/test/Preprocessor/predefined-arch-macros.c | |
| parent | dfc277f35012995d5b8052685c1965b6ca001d6e (diff) | |
| download | bcm5719-llvm-6108936fa633f32309f4bc7fd52544a263924bbf.tar.gz bcm5719-llvm-6108936fa633f32309f4bc7fd52544a263924bbf.zip | |
Enabling 3DNow! prefetch instruction support for a few AMD processors in the
clang front end. This change will allow the __PRFCHW__ macro to be set on these
processors and hence include prfchwintrin.h in x86intrin.h header. Support for
the intrinsic itself seems to have already been added in r178041.
Differential Revision: http://llvm-reviews.chandlerc.com/D1934
llvm-svn: 192829
Diffstat (limited to 'clang/test/Preprocessor/predefined-arch-macros.c')
| -rw-r--r-- | clang/test/Preprocessor/predefined-arch-macros.c | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/clang/test/Preprocessor/predefined-arch-macros.c b/clang/test/Preprocessor/predefined-arch-macros.c index bcfe90f29cb..45e317a3d8c 100644 --- a/clang/test/Preprocessor/predefined-arch-macros.c +++ b/clang/test/Preprocessor/predefined-arch-macros.c @@ -1166,6 +1166,7 @@ // CHECK_BTVER1_M32: #define __LZCNT__ 1 // CHECK_BTVER1_M32: #define __MMX__ 1 // CHECK_BTVER1_M32: #define __POPCNT__ 1 +// CHECK_BTVER1_M32: #define __PRFCHW__ 1 // CHECK_BTVER1_M32: #define __SSE2_MATH__ 1 // CHECK_BTVER1_M32: #define __SSE2__ 1 // CHECK_BTVER1_M32: #define __SSE3__ 1 @@ -1186,6 +1187,7 @@ // CHECK_BTVER1_M64: #define __LZCNT__ 1 // CHECK_BTVER1_M64: #define __MMX__ 1 // CHECK_BTVER1_M64: #define __POPCNT__ 1 +// CHECK_BTVER1_M64: #define __PRFCHW__ 1 // CHECK_BTVER1_M64: #define __SSE2_MATH__ 1 // CHECK_BTVER1_M64: #define __SSE2__ 1 // CHECK_BTVER1_M64: #define __SSE3__ 1 @@ -1210,6 +1212,7 @@ // CHECK_BTVER2_M32: #define __LZCNT__ 1 // CHECK_BTVER2_M32: #define __MMX__ 1 // CHECK_BTVER2_M32: #define __POPCNT__ 1 +// CHECK_BTVER2_M32: #define __PRFCHW__ 1 // CHECK_BTVER2_M32: #define __SSE2_MATH__ 1 // CHECK_BTVER2_M32: #define __SSE2__ 1 // CHECK_BTVER2_M32: #define __SSE3__ 1 @@ -1232,6 +1235,7 @@ // CHECK_BTVER2_M64: #define __LZCNT__ 1 // CHECK_BTVER2_M64: #define __MMX__ 1 // CHECK_BTVER2_M64: #define __POPCNT__ 1 +// CHECK_BTVER2_M64: #define __PRFCHW__ 1 // CHECK_BTVER2_M64: #define __SSE2_MATH__ 1 // CHECK_BTVER2_M64: #define __SSE2__ 1 // CHECK_BTVER2_M64: #define __SSE3__ 1 @@ -1258,6 +1262,7 @@ // CHECK_BDVER1_M32: #define __MMX__ 1 // CHECK_BDVER1_M32: #define __PCLMUL__ 1 // CHECK_BDVER1_M32: #define __POPCNT__ 1 +// CHECK_BDVER1_M32: #define __PRFCHW__ 1 // CHECK_BDVER1_M32: #define __SSE2_MATH__ 1 // CHECK_BDVER1_M32: #define __SSE2__ 1 // CHECK_BDVER1_M32: #define __SSE3__ 1 @@ -1285,6 +1290,7 @@ // CHECK_BDVER1_M64: #define __MMX__ 1 // CHECK_BDVER1_M64: #define __PCLMUL__ 1 // CHECK_BDVER1_M64: #define __POPCNT__ 1 +// CHECK_BDVER1_M64: #define __PRFCHW__ 1 // CHECK_BDVER1_M64: #define __SSE2_MATH__ 1 // CHECK_BDVER1_M64: #define __SSE2__ 1 // CHECK_BDVER1_M64: #define __SSE3__ 1 @@ -1317,6 +1323,7 @@ // CHECK_BDVER2_M32: #define __MMX__ 1 // CHECK_BDVER2_M32: #define __PCLMUL__ 1 // CHECK_BDVER2_M32: #define __POPCNT__ 1 +// CHECK_BDVER2_M32: #define __PRFCHW__ 1 // CHECK_BDVER2_M32: #define __SSE2_MATH__ 1 // CHECK_BDVER2_M32: #define __SSE2__ 1 // CHECK_BDVER2_M32: #define __SSE3__ 1 @@ -1348,6 +1355,7 @@ // CHECK_BDVER2_M64: #define __MMX__ 1 // CHECK_BDVER2_M64: #define __PCLMUL__ 1 // CHECK_BDVER2_M64: #define __POPCNT__ 1 +// CHECK_BDVER2_M64: #define __PRFCHW__ 1 // CHECK_BDVER2_M64: #define __SSE2_MATH__ 1 // CHECK_BDVER2_M64: #define __SSE2__ 1 // CHECK_BDVER2_M64: #define __SSE3__ 1 |
