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| author | Benjamin Kramer <benny.kra@googlemail.com> | 2012-07-07 09:39:18 +0000 |
|---|---|---|
| committer | Benjamin Kramer <benny.kra@googlemail.com> | 2012-07-07 09:39:18 +0000 |
| commit | 1e250395fae1a15217039ed51b624530c7a21743 (patch) | |
| tree | 32ad0f9e450d6547eb15efbb569cbc5a29456f92 /clang/test/Preprocessor/predefined-arch-macros.c | |
| parent | e20c83d9ede057602e78c482e644a3d44a966f36 (diff) | |
| download | bcm5719-llvm-1e250395fae1a15217039ed51b624530c7a21743.tar.gz bcm5719-llvm-1e250395fae1a15217039ed51b624530c7a21743.zip | |
Wire up -mrdrnd for X86.
For some reason GCC decided to call the feature rdrnd instead of rdrand,
which requires translating it for LLVM.
llvm-svn: 159897
Diffstat (limited to 'clang/test/Preprocessor/predefined-arch-macros.c')
| -rw-r--r-- | clang/test/Preprocessor/predefined-arch-macros.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/clang/test/Preprocessor/predefined-arch-macros.c b/clang/test/Preprocessor/predefined-arch-macros.c index 691173f7bd0..2361abe20cd 100644 --- a/clang/test/Preprocessor/predefined-arch-macros.c +++ b/clang/test/Preprocessor/predefined-arch-macros.c @@ -420,6 +420,7 @@ // CHECK_COREI7_AVX_M32: #define __AVX__ 1 // CHECK_COREI7_AVX_M32: #define __MMX__ 1 // CHECK_COREI7_AVX_M32: #define __PCLMUL__ 1 +// CHECK_COREI7_AVX_M32-NOT: __RDRND__ // CHECK_COREI7_AVX_M32: #define __POPCNT__ 1 // CHECK_COREI7_AVX_M32: #define __SSE2__ 1 // CHECK_COREI7_AVX_M32: #define __SSE3__ 1 @@ -440,6 +441,7 @@ // CHECK_COREI7_AVX_M64: #define __AVX__ 1 // CHECK_COREI7_AVX_M64: #define __MMX__ 1 // CHECK_COREI7_AVX_M64: #define __PCLMUL__ 1 +// CHECK_COREI7_AVX_M64-NOT: __RDRND__ // CHECK_COREI7_AVX_M64: #define __POPCNT__ 1 // CHECK_COREI7_AVX_M64: #define __SSE2_MATH__ 1 // CHECK_COREI7_AVX_M64: #define __SSE2__ 1 @@ -464,6 +466,7 @@ // CHECK_CORE_AVX_I_M32: #define __AVX__ 1 // CHECK_CORE_AVX_I_M32: #define __MMX__ 1 // CHECK_CORE_AVX_I_M32: #define __PCLMUL__ 1 +// CHECK_CORE_AVX_I_M32: #define __RDRND__ 1 // CHECK_CORE_AVX_I_M32: #define __SSE2__ 1 // CHECK_CORE_AVX_I_M32: #define __SSE3__ 1 // CHECK_CORE_AVX_I_M32: #define __SSE4_1__ 1 @@ -483,6 +486,7 @@ // CHECK_CORE_AVX_I_M64: #define __AVX__ 1 // CHECK_CORE_AVX_I_M64: #define __MMX__ 1 // CHECK_CORE_AVX_I_M64: #define __PCLMUL__ 1 +// CHECK_CORE_AVX_I_M64: #define __RDRND__ 1 // CHECK_CORE_AVX_I_M64: #define __SSE2_MATH__ 1 // CHECK_CORE_AVX_I_M64: #define __SSE2__ 1 // CHECK_CORE_AVX_I_M64: #define __SSE3__ 1 @@ -511,6 +515,7 @@ // CHECK_CORE_AVX2_M32: #define __MMX__ 1 // CHECK_CORE_AVX2_M32: #define __PCLMUL__ 1 // CHECK_CORE_AVX2_M32: #define __POPCNT__ 1 +// CHECK_CORE_AVX2_M32: #define __RDRND__ 1 // CHECK_CORE_AVX2_M32: #define __SSE2__ 1 // CHECK_CORE_AVX2_M32: #define __SSE3__ 1 // CHECK_CORE_AVX2_M32: #define __SSE4_1__ 1 @@ -535,6 +540,7 @@ // CHECK_CORE_AVX2_M64: #define __MMX__ 1 // CHECK_CORE_AVX2_M64: #define __PCLMUL__ 1 // CHECK_CORE_AVX2_M64: #define __POPCNT__ 1 +// CHECK_CORE_AVX2_M64: #define __RDRND__ 1 // CHECK_CORE_AVX2_M64: #define __SSE2_MATH__ 1 // CHECK_CORE_AVX2_M64: #define __SSE2__ 1 // CHECK_CORE_AVX2_M64: #define __SSE3__ 1 |
