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authorSimon Atanasyan <simon@atanasyan.com>2015-02-20 23:37:40 +0000
committerSimon Atanasyan <simon@atanasyan.com>2015-02-20 23:37:40 +0000
commit162feb5f8e45fbdb786d3439cb575dc6eb9da89f (patch)
tree9ddf236a2fc8d83c5223ce0804816cc3117573d6 /clang/test/Preprocessor/init.c
parent0385152752fd3e4bc89cf5461a636247272d3b85 (diff)
downloadbcm5719-llvm-162feb5f8e45fbdb786d3439cb575dc6eb9da89f.tar.gz
bcm5719-llvm-162feb5f8e45fbdb786d3439cb575dc6eb9da89f.zip
[Mips] Support mips32r3, mips32r5, mips64r3, mips64r5 MIPS ISA names
The patch teaches the clang's driver to understand new MIPS ISA names, pass appropriate options to the assembler, defines corresponding macros etc http://reviews.llvm.org/D7737 llvm-svn: 230092
Diffstat (limited to 'clang/test/Preprocessor/init.c')
-rw-r--r--clang/test/Preprocessor/init.c36
1 files changed, 36 insertions, 0 deletions
diff --git a/clang/test/Preprocessor/init.c b/clang/test/Preprocessor/init.c
index 41fe812ff32..4bde9e4bf10 100644
--- a/clang/test/Preprocessor/init.c
+++ b/clang/test/Preprocessor/init.c
@@ -4264,6 +4264,24 @@
// MIPS-ARCH-32R2:#define __mips_isa_rev 2
//
// RUN: %clang_cc1 -E -dM -ffreestanding -triple=mips-none-none \
+// RUN: -target-cpu mips32r3 < /dev/null \
+// RUN: | FileCheck -check-prefix MIPS-ARCH-32R3 %s
+//
+// MIPS-ARCH-32R3:#define _MIPS_ARCH "mips32r3"
+// MIPS-ARCH-32R3:#define _MIPS_ARCH_MIPS32R3 1
+// MIPS-ARCH-32R3:#define _MIPS_ISA _MIPS_ISA_MIPS32
+// MIPS-ARCH-32R3:#define __mips_isa_rev 3
+//
+// RUN: %clang_cc1 -E -dM -ffreestanding -triple=mips-none-none \
+// RUN: -target-cpu mips32r5 < /dev/null \
+// RUN: | FileCheck -check-prefix MIPS-ARCH-32R5 %s
+//
+// MIPS-ARCH-32R5:#define _MIPS_ARCH "mips32r5"
+// MIPS-ARCH-32R5:#define _MIPS_ARCH_MIPS32R5 1
+// MIPS-ARCH-32R5:#define _MIPS_ISA _MIPS_ISA_MIPS32
+// MIPS-ARCH-32R5:#define __mips_isa_rev 5
+//
+// RUN: %clang_cc1 -E -dM -ffreestanding -triple=mips-none-none \
// RUN: -target-cpu mips32r6 < /dev/null \
// RUN: | FileCheck -check-prefix MIPS-ARCH-32R6 %s
//
@@ -4300,6 +4318,24 @@
// MIPS-ARCH-64R2:#define __mips_isa_rev 2
//
// RUN: %clang_cc1 -E -dM -ffreestanding -triple=mips64-none-none \
+// RUN: -target-cpu mips64r3 < /dev/null \
+// RUN: | FileCheck -check-prefix MIPS-ARCH-64R3 %s
+//
+// MIPS-ARCH-64R3:#define _MIPS_ARCH "mips64r3"
+// MIPS-ARCH-64R3:#define _MIPS_ARCH_MIPS64R3 1
+// MIPS-ARCH-64R3:#define _MIPS_ISA _MIPS_ISA_MIPS64
+// MIPS-ARCH-64R3:#define __mips_isa_rev 3
+//
+// RUN: %clang_cc1 -E -dM -ffreestanding -triple=mips64-none-none \
+// RUN: -target-cpu mips64r5 < /dev/null \
+// RUN: | FileCheck -check-prefix MIPS-ARCH-64R5 %s
+//
+// MIPS-ARCH-64R5:#define _MIPS_ARCH "mips64r5"
+// MIPS-ARCH-64R5:#define _MIPS_ARCH_MIPS64R5 1
+// MIPS-ARCH-64R5:#define _MIPS_ISA _MIPS_ISA_MIPS64
+// MIPS-ARCH-64R5:#define __mips_isa_rev 5
+//
+// RUN: %clang_cc1 -E -dM -ffreestanding -triple=mips64-none-none \
// RUN: -target-cpu mips64r6 < /dev/null \
// RUN: | FileCheck -check-prefix MIPS-ARCH-64R6 %s
//
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