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| author | Chad Rosier <mcrosier@codeaurora.org> | 2017-11-21 18:08:34 +0000 |
|---|---|---|
| committer | Chad Rosier <mcrosier@codeaurora.org> | 2017-11-21 18:08:34 +0000 |
| commit | fe97d7367411227427d307e897989c19961826e7 (patch) | |
| tree | 11d5b4542529edcb15b759a9528428ac2a1199c3 /clang/test/OpenMP/target_enter_data_codegen.cpp | |
| parent | 70e22d121d435276aeddb38764d4f72c3985c3bd (diff) | |
| download | bcm5719-llvm-fe97d7367411227427d307e897989c19961826e7.tar.gz bcm5719-llvm-fe97d7367411227427d307e897989c19961826e7.zip | |
[AArch64] Mark mrs of TPIDR_EL0 (thread pointer) as *having* side effects.
This partially reverts r298851. The the underlying issue is that we don't
currently model the dependency between mrs (read system register) and
msr (write system register) instructions.
Something like the below should never be reordered:
msr TPIDR_EL0, x0 ;; set thread pointer
mrs x8, TPIDR_EL0 ;; read thread pointer
but was being reordered after r298851. The functional part of the patch
that wasn't reverted needed to remain in place in order to not break
r299462.
PR35317
llvm-svn: 318788
Diffstat (limited to 'clang/test/OpenMP/target_enter_data_codegen.cpp')
0 files changed, 0 insertions, 0 deletions
