[OPENMP] Update the diagnosis message for canonical loop form, by Chi

Chun Chen.

The previous patch (https://reviews.llvm.org/D54441) support the
relational-op != very well for openmp canonical loop form, however,
it didn't update the diagnosis message. So this patch is simply
update the diagnosis message by adding !=, update the test
related to it, and update the section number for canonical loop
form for OpenMP 5.0 in comment.

Differential Revision: https://reviews.llvm.org/D66559

llvm-svn: 371631

1 files changed, 69 insertions, 58 deletions

diff --git a/clang/test/OpenMP/parallel_for_codegen.cpp b/clang/test/OpenMP/parallel_for_codegen.cpp
index fe1eb1ef114..e4e76060e70 100644
--- a/clang/test/OpenMP/parallel_for_codegen.cpp
+++ b/clang/test/OpenMP/parallel_for_codegen.cpp
@@ -11,6 +11,11 @@
 // RUN: %clang_cc1 -verify -triple x86_64-apple-darwin10 -O1 -fopenmp-simd -emit-llvm %s -o - | FileCheck --check-prefix SIMD-ONLY0 %s
 // SIMD-ONLY0-NOT: {{__kmpc|__tgt}}
 // expected-no-diagnostics
+
+// RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=50 -DOMP5 -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck --check-prefix=OMP5 %s
+// RUN: %clang_cc1 -fopenmp -fopenmp-version=50 -DOMP5 -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s
+// RUN: %clang_cc1 -fopenmp -fopenmp-version=50 -DOMP5 -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck --check-prefix=OMP5 %s
+// RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=50 -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s
 #ifndef HEADER
 #define HEADER
 
@@ -378,85 +383,91 @@ void parallel_for(float *a, const int n) {
 // TERM_DEBUG-DAG: [[DBG_LOC_START]] = !DILocation(line: [[@LINE-4]],
 // TERM_DEBUG-DAG: [[DBG_LOC_END]] = !DILocation(line: [[@LINE-18]],
 
-// CHECK-LABEL: increment
+#ifdef OMP5
+// OMP5-DAG: [[IDENT_T_TY:%.+]] = type { i32, i32, i32, i32, i8* }
+// OMP5-DAG: [[LOOP_LOC:@.+]] = private unnamed_addr global [[IDENT_T_TY]] { i32 0, i32 514, i32 0, i32 0, i8*
+
+// OMP5-LABEL: increment
 int increment () {
-// CHECK: [[GTID:%.+]] = call i32 @__kmpc_global_thread_num([[IDENT_T_TY]]* [[DEFAULT_LOC:[@%].+]])
+// OMP5: [[GTID:%.+]] = call i32 @__kmpc_global_thread_num([[IDENT_T_TY]]* [[DEFAULT_LOC:[@%].+]])
   #pragma omp for
 // Determine UB = min(UB, GlobalUB)
-// CHECK: call void @__kmpc_for_static_init_4([[IDENT_T_TY]]* [[LOOP_LOC]], i32 [[GTID]], i32 34, i32* [[IS_LAST:%[^,]+]], i32* [[OMP_LB:%[^,]+]], i32* [[OMP_UB:%[^,]+]], i32* [[OMP_ST:%[^,]+]], i32 1, i32 1)
-// CHECK-NEXT: [[UB:%.+]] = load i32, i32* [[OMP_UB]]
-// CHECK-NEXT: [[UBCMP:%.+]] = icmp sgt i32 [[UB]], 4
-// CHECK-NEXT: br i1 [[UBCMP]], label [[UB_TRUE:%[^,]+]], label [[UB_FALSE:%[^,]+]]
-// CHECK: [[UBRESULT:%.+]] = phi i32 [ 4, [[UB_TRUE]] ], [ [[UBVAL:%[^,]+]], [[UB_FALSE]] ]
-// CHECK-NEXT: store i32 [[UBRESULT]], i32* [[OMP_UB]]
-// CHECK-NEXT: [[LB:%.+]] = load i32, i32* [[OMP_LB]]
-// CHECK-NEXT: store i32 [[LB]], i32* [[OMP_IV:[^,]+]]
-// CHECK-NEXT: br label %[[LOOP1_HEAD:.+]]
+// OMP5: call void @__kmpc_for_static_init_4([[IDENT_T_TY]]* [[LOOP_LOC]], i32 [[GTID]], i32 34, i32* [[IS_LAST:%[^,]+]], i32* [[OMP_LB:%[^,]+]], i32* [[OMP_UB:%[^,]+]], i32* [[OMP_ST:%[^,]+]], i32 1, i32 1)
+// OMP5-NEXT: [[UB:%.+]] = load i32, i32* [[OMP_UB]]
+// OMP5-NEXT: [[UBCMP:%.+]] = icmp sgt i32 [[UB]], 4
+// OMP5-NEXT: br i1 [[UBCMP]], label [[UB_TRUE:%[^,]+]], label [[UB_FALSE:%[^,]+]]
+// OMP5: [[UBRESULT:%.+]] = phi i32 [ 4, [[UB_TRUE]] ], [ [[UBVAL:%[^,]+]], [[UB_FALSE]] ]
+// OMP5-NEXT: store i32 [[UBRESULT]], i32* [[OMP_UB]]
+// OMP5-NEXT: [[LB:%.+]] = load i32, i32* [[OMP_LB]]
+// OMP5-NEXT: store i32 [[LB]], i32* [[OMP_IV:[^,]+]]
+// OMP5-NEXT: br label %[[LOOP1_HEAD:.+]]
 
 // Loop header
-// CHECK: [[LOOP1_HEAD]]
-// CHECK: [[IV:%.+]] = load i32, i32* [[OMP_IV]]
-// CHECK-NEXT: [[UB:%.+]] = load i32, i32* [[OMP_UB]]
-// CHECK-NEXT: [[CMP:%.+]] = icmp sle i32 [[IV]], [[UB]]
-// CHECK-NEXT: br i1 [[CMP]], label %[[LOOP1_BODY:[^,]+]], label %[[LOOP1_END:[^,]+]]
+// OMP5: [[LOOP1_HEAD]]
+// OMP5: [[IV:%.+]] = load i32, i32* [[OMP_IV]]
+// OMP5-NEXT: [[UB:%.+]] = load i32, i32* [[OMP_UB]]
+// OMP5-NEXT: [[CMP:%.+]] = icmp sle i32 [[IV]], [[UB]]
+// OMP5-NEXT: br i1 [[CMP]], label %[[LOOP1_BODY:[^,]+]], label %[[LOOP1_END:[^,]+]]
 
   for (int i = 0 ; i != 5; ++i)
 // Start of body: calculate i from IV:
-// CHECK: [[LOOP1_BODY]]
-// CHECK: [[IV1_1:%.+]] = load i32, i32* [[OMP_IV]]
-// CHECK-NEXT: [[CALC_I_1:%.+]] = mul nsw i32 [[IV1_1]], 1
-// CHECK-NEXT: [[CALC_I_2:%.+]] = add nsw i32 0, [[CALC_I_1]]
-// CHECK-NEXT: store i32 [[CALC_I_2]], i32* [[LC_I:.+]]
-// CHECK: [[IV1_2:%.+]] = load i32, i32* [[OMP_IV]]{{.*}}
-// CHECK-NEXT: [[ADD1_2:%.+]] = add nsw i32 [[IV1_2]], 1
-// CHECK-NEXT: store i32 [[ADD1_2]], i32* [[OMP_IV]]
-// CHECK-NEXT: br label %[[LOOP1_HEAD]]
+// OMP5: [[LOOP1_BODY]]
+// OMP5: [[IV1_1:%.+]] = load i32, i32* [[OMP_IV]]
+// OMP5-NEXT: [[CALC_I_1:%.+]] = mul nsw i32 [[IV1_1]], 1
+// OMP5-NEXT: [[CALC_I_2:%.+]] = add nsw i32 0, [[CALC_I_1]]
+// OMP5-NEXT: store i32 [[CALC_I_2]], i32* [[LC_I:.+]]
+// OMP5: [[IV1_2:%.+]] = load i32, i32* [[OMP_IV]]{{.*}}
+// OMP5-NEXT: [[ADD1_2:%.+]] = add nsw i32 [[IV1_2]], 1
+// OMP5-NEXT: store i32 [[ADD1_2]], i32* [[OMP_IV]]
+// OMP5-NEXT: br label %[[LOOP1_HEAD]]
     ;
-// CHECK: [[LOOP1_END]]
-// CHECK: call void @__kmpc_for_static_fini([[IDENT_T_TY]]* [[LOOP_LOC]], i32 [[GTID]])
-// CHECK: __kmpc_barrier
+// OMP5: [[LOOP1_END]]
+// OMP5: call void @__kmpc_for_static_fini([[IDENT_T_TY]]* [[LOOP_LOC]], i32 [[GTID]])
+// OMP5: __kmpc_barrier
   return 0;
-// CHECK: ret i32 0
+// OMP5: ret i32 0
 }
 
-// CHECK-LABEL: decrement_nowait
+// OMP5-LABEL: decrement_nowait
 int decrement_nowait () {
-// CHECK: [[GTID:%.+]] = call i32 @__kmpc_global_thread_num([[IDENT_T_TY]]* [[DEFAULT_LOC:[@%].+]])
+// OMP5: [[GTID:%.+]] = call i32 @__kmpc_global_thread_num([[IDENT_T_TY]]* [[DEFAULT_LOC:[@%].+]])
   #pragma omp for nowait
 // Determine UB = min(UB, GlobalUB)
-// CHECK: call void @__kmpc_for_static_init_4([[IDENT_T_TY]]* [[LOOP_LOC]], i32 [[GTID]], i32 34, i32* [[IS_LAST:%[^,]+]], i32* [[OMP_LB:%[^,]+]], i32* [[OMP_UB:%[^,]+]], i32* [[OMP_ST:%[^,]+]], i32 1, i32 1)
-// CHECK-NEXT: [[UB:%.+]] = load i32, i32* [[OMP_UB]]
-// CHECK-NEXT: [[UBCMP:%.+]] = icmp sgt i32 [[UB]], 4
-// CHECK-NEXT: br i1 [[UBCMP]], label [[UB_TRUE:%[^,]+]], label [[UB_FALSE:%[^,]+]]
-// CHECK: [[UBRESULT:%.+]] = phi i32 [ 4, [[UB_TRUE]] ], [ [[UBVAL:%[^,]+]], [[UB_FALSE]] ]
-// CHECK-NEXT: store i32 [[UBRESULT]], i32* [[OMP_UB]]
-// CHECK-NEXT: [[LB:%.+]] = load i32, i32* [[OMP_LB]]
-// CHECK-NEXT: store i32 [[LB]], i32* [[OMP_IV:[^,]+]]
-// CHECK-NEXT: br label %[[LOOP1_HEAD:.+]]
+// OMP5: call void @__kmpc_for_static_init_4([[IDENT_T_TY]]* [[LOOP_LOC]], i32 [[GTID]], i32 34, i32* [[IS_LAST:%[^,]+]], i32* [[OMP_LB:%[^,]+]], i32* [[OMP_UB:%[^,]+]], i32* [[OMP_ST:%[^,]+]], i32 1, i32 1)
+// OMP5-NEXT: [[UB:%.+]] = load i32, i32* [[OMP_UB]]
+// OMP5-NEXT: [[UBCMP:%.+]] = icmp sgt i32 [[UB]], 4
+// OMP5-NEXT: br i1 [[UBCMP]], label [[UB_TRUE:%[^,]+]], label [[UB_FALSE:%[^,]+]]
+// OMP5: [[UBRESULT:%.+]] = phi i32 [ 4, [[UB_TRUE]] ], [ [[UBVAL:%[^,]+]], [[UB_FALSE]] ]
+// OMP5-NEXT: store i32 [[UBRESULT]], i32* [[OMP_UB]]
+// OMP5-NEXT: [[LB:%.+]] = load i32, i32* [[OMP_LB]]
+// OMP5-NEXT: store i32 [[LB]], i32* [[OMP_IV:[^,]+]]
+// OMP5-NEXT: br label %[[LOOP1_HEAD:.+]]
 
 // Loop header
-// CHECK: [[LOOP1_HEAD]]
-// CHECK: [[IV:%.+]] = load i32, i32* [[OMP_IV]]
-// CHECK-NEXT: [[UB:%.+]] = load i32, i32* [[OMP_UB]]
-// CHECK-NEXT: [[CMP:%.+]] = icmp sle i32 [[IV]], [[UB]]
-// CHECK-NEXT: br i1 [[CMP]], label %[[LOOP1_BODY:[^,]+]], label %[[LOOP1_END:[^,]+]]
+// OMP5: [[LOOP1_HEAD]]
+// OMP5: [[IV:%.+]] = load i32, i32* [[OMP_IV]]
+// OMP5-NEXT: [[UB:%.+]] = load i32, i32* [[OMP_UB]]
+// OMP5-NEXT: [[CMP:%.+]] = icmp sle i32 [[IV]], [[UB]]
+// OMP5-NEXT: br i1 [[CMP]], label %[[LOOP1_BODY:[^,]+]], label %[[LOOP1_END:[^,]+]]
   for (int j = 5 ; j != 0; --j)
 // Start of body: calculate i from IV:
-// CHECK: [[LOOP1_BODY]]
-// CHECK: [[IV2_1:%.+]] = load i32, i32* [[OMP_IV]]
-// CHECK-NEXT: [[CALC_II_1:%.+]] = mul nsw i32 [[IV2_1]], 1
-// CHECK-NEXT: [[CALC_II_2:%.+]] = sub nsw i32 5, [[CALC_II_1]]
-// CHECK-NEXT: store i32 [[CALC_II_2]], i32* [[LC_I:.+]]
-// CHECK: [[IV2_2:%.+]] = load i32, i32* [[OMP_IV]]{{.*}}
-// CHECK-NEXT: [[ADD2_2:%.+]] = add nsw i32 [[IV2_2]], 1
-// CHECK-NEXT: store i32 [[ADD2_2]], i32* [[OMP_IV]]
-// CHECK-NEXT: br label %[[LOOP1_HEAD]]
+// OMP5: [[LOOP1_BODY]]
+// OMP5: [[IV2_1:%.+]] = load i32, i32* [[OMP_IV]]
+// OMP5-NEXT: [[CALC_II_1:%.+]] = mul nsw i32 [[IV2_1]], 1
+// OMP5-NEXT: [[CALC_II_2:%.+]] = sub nsw i32 5, [[CALC_II_1]]
+// OMP5-NEXT: store i32 [[CALC_II_2]], i32* [[LC_I:.+]]
+// OMP5: [[IV2_2:%.+]] = load i32, i32* [[OMP_IV]]{{.*}}
+// OMP5-NEXT: [[ADD2_2:%.+]] = add nsw i32 [[IV2_2]], 1
+// OMP5-NEXT: store i32 [[ADD2_2]], i32* [[OMP_IV]]
+// OMP5-NEXT: br label %[[LOOP1_HEAD]]
     ;
-// CHECK: [[LOOP1_END]]
-// CHECK: call void @__kmpc_for_static_fini([[IDENT_T_TY]]* [[LOOP_LOC]], i32 [[GTID]])
-// CHECK-NOT: __kmpc_barrier
+// OMP5: [[LOOP1_END]]
+// OMP5: call void @__kmpc_for_static_fini([[IDENT_T_TY]]* [[LOOP_LOC]], i32 [[GTID]])
+// OMP5-NOT: __kmpc_barrier
   return 0;
-// CHECK: ret i32 0
+// OMP5: ret i32 0
 }
+#endif
+
 #endif // HEADER