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| author | Jun Bum Lim <junbuml@codeaurora.org> | 2015-09-14 16:19:52 +0000 |
|---|---|---|
| committer | Jun Bum Lim <junbuml@codeaurora.org> | 2015-09-14 16:19:52 +0000 |
| commit | 34b9bd0435a1e8f97bf97e08a2da37d8c01e80ec (patch) | |
| tree | 5151aba4e563c5cd02743ea5c39d743d184edd63 /clang/test/Modules | |
| parent | 11282dcac637499e15ae1e58208d895515f3e8bf (diff) | |
| download | bcm5719-llvm-34b9bd0435a1e8f97bf97e08a2da37d8c01e80ec.tar.gz bcm5719-llvm-34b9bd0435a1e8f97bf97e08a2da37d8c01e80ec.zip | |
Improve ISel using across lane min/max reduction
In vectorized integer min/max reduction code, the final "reduce" step
is sub-optimal. In AArch64, this change wll combine :
%svn0 = vector_shuffle %0, undef<2,3,u,u>
%smax0 = smax %0, svn0
%svn3 = vector_shuffle %smax0, undef<1,u,u,u>
%sc = setcc %smax0, %svn3, gt
%n0 = extract_vector_elt %sc, #0
%n1 = extract_vector_elt %smax0, #0
%n2 = extract_vector_elt $smax0, #1
%result = select %n0, %n1, n2
becomes :
%1 = smaxv %0
%result = extract_vector_elt %1, 0
This change extends r246790.
llvm-svn: 247575
Diffstat (limited to 'clang/test/Modules')
0 files changed, 0 insertions, 0 deletions
