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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2019-10-10 07:11:33 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2019-10-10 07:11:33 +0000 |
| commit | 12994a70cf798eec60a236d81bb5618a2674fccf (patch) | |
| tree | 8f8b7f91dc07cb39c6bcb4838846ead3ce9cf66e /clang/test/CodeGenCXX/pragma-loop-predicate.cpp | |
| parent | 0a84576262e9dbfafbedc327c6a6f83c50b61f10 (diff) | |
| download | bcm5719-llvm-12994a70cf798eec60a236d81bb5618a2674fccf.tar.gz bcm5719-llvm-12994a70cf798eec60a236d81bb5618a2674fccf.zip | |
AMDGPU: Use SGPR_128 instead of SReg_128 for vregs
SGPR_128 only includes the real allocatable SGPRs, and SReg_128 adds
the additional non-allocatable TTMP registers. There's no point in
allocating SReg_128 vregs. This shrinks the size of the classes
regalloc needs to consider, which is usually good.
llvm-svn: 374284
Diffstat (limited to 'clang/test/CodeGenCXX/pragma-loop-predicate.cpp')
0 files changed, 0 insertions, 0 deletions
