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| author | Nicolai Haehnle <nhaehnle@gmail.com> | 2016-01-04 23:35:53 +0000 |
|---|---|---|
| committer | Nicolai Haehnle <nhaehnle@gmail.com> | 2016-01-04 23:35:53 +0000 |
| commit | 5b50497617957f3d18e337ce5d1acddd09853303 (patch) | |
| tree | b32f46d2bfda1f1865cad7b06adf135e539b10bb /clang/test/CodeGenCXX/ms-inline-asm-fields.cpp | |
| parent | eed30e5a81a5d40f3c1330a379b8fc8077315bd9 (diff) | |
| download | bcm5719-llvm-5b50497617957f3d18e337ce5d1acddd09853303.tar.gz bcm5719-llvm-5b50497617957f3d18e337ce5d1acddd09853303.zip | |
AMDGPU: add +xnack feature
Summary:
Enabling this feature will account for the two SGPRs used by the hardware
to store the XNACK_MASK physically.
The hardware only requires this reservation when the XNACK feature is
explicitly enabled. At some point, HSA will probably want to do that, but
it does increase SGPR register pressure, so leave it disabled by default
for now (but do add a small test).
Reviewers: arsenm, tstellarAMD
Subscribers: arsenm, llvm-commits
Differential Revision: http://reviews.llvm.org/D15869
llvm-svn: 256794
Diffstat (limited to 'clang/test/CodeGenCXX/ms-inline-asm-fields.cpp')
0 files changed, 0 insertions, 0 deletions
