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authorTilmann Scheller <tilmann.scheller@googlemail.com>2013-09-27 13:28:17 +0000
committerTilmann Scheller <tilmann.scheller@googlemail.com>2013-09-27 13:28:17 +0000
commit1aebfa0a9b97778712be9ee9b3d99545bece76e5 (patch)
treecfc68cf27aee12796bf0f1b0119c597f6cebb2d0 /clang/test/CodeGenCXX/microsoft-abi-vtables-multiple-nonvirtual-inheritance.cpp
parentc72593e69a8a0a2acc76312ea3f183a0fe18de83 (diff)
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ARM: Teach assembler to enforce constraints for ARM LDRD destination register operands.
As specified in A8.8.72/A8.8.73/A8.8.74 in the ARM ARM, all variants of the ARM LDRD instruction have the following two constraints: LDRD<c> <Rt>, <Rt2>, ... (a) Rt must be even-numbered and not r14 (b) Rt2 must be R(t+1) If those two constraints are not met the result of executing the instruction will be unpredictable. Constraint (b) was already enforced, this commit adds support for constraint (a). Fixes rdar://14479793. llvm-svn: 191520
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