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| author | Rafael Espindola <rafael.espindola@gmail.com> | 2015-01-22 00:24:57 +0000 |
|---|---|---|
| committer | Rafael Espindola <rafael.espindola@gmail.com> | 2015-01-22 00:24:57 +0000 |
| commit | e5df59ff78faebd897e81907606ce6074aac0df6 (patch) | |
| tree | 7f1ba19983a42f716c7643dd07244aa4a9531790 /clang/test/CodeGenCXX/copy-constructor-synthesis.cpp | |
| parent | 343e4964733d0063de2551a93d912b93880cada9 (diff) | |
| download | bcm5719-llvm-e5df59ff78faebd897e81907606ce6074aac0df6.tar.gz bcm5719-llvm-e5df59ff78faebd897e81907606ce6074aac0df6.zip | |
Emit DeferredDeclsToEmit in a DFS order.
Currently we emit DeferredDeclsToEmit in reverse order. This patch changes that.
The advantages of the change are that
* The output order is a bit closer to the source order. The change to
test/CodeGenCXX/pod-member-memcpys.cpp is a good example.
* If we decide to deffer more, it will not cause as large changes in the
estcases as it would without this patch.
llvm-svn: 226751
Diffstat (limited to 'clang/test/CodeGenCXX/copy-constructor-synthesis.cpp')
| -rw-r--r-- | clang/test/CodeGenCXX/copy-constructor-synthesis.cpp | 24 |
1 files changed, 12 insertions, 12 deletions
diff --git a/clang/test/CodeGenCXX/copy-constructor-synthesis.cpp b/clang/test/CodeGenCXX/copy-constructor-synthesis.cpp index abbb7d05351..30178a073bb 100644 --- a/clang/test/CodeGenCXX/copy-constructor-synthesis.cpp +++ b/clang/test/CodeGenCXX/copy-constructor-synthesis.cpp @@ -146,18 +146,6 @@ void f(B b1) { // CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* [[T4]], i8* [[T5]], i64 8, i32 8, i1 false) // CHECK-NEXT: ret [[A]]* [[THIS]] -// CHECK-LABEL: define linkonce_odr void @_ZN12rdar138169401AC2ERKS0_( -// CHECK: [[THIS:%.*]] = load [[A]]** -// CHECK-NEXT: [[T0:%.*]] = bitcast [[A]]* [[THIS]] to i32 (...)*** -// CHECK-NEXT: store i32 (...)** bitcast (i8** getelementptr inbounds ([4 x i8*]* @_ZTVN12rdar138169401AE, i64 0, i64 2) to i32 (...)**), i32 (...)*** [[T0]] -// CHECK-NEXT: [[T0:%.*]] = getelementptr inbounds [[A]]* [[THIS]], i32 0, i32 1 -// CHECK-NEXT: [[OTHER:%.*]] = load [[A]]** -// CHECK-NEXT: [[T2:%.*]] = getelementptr inbounds [[A]]* [[OTHER]], i32 0, i32 1 -// CHECK-NEXT: [[T4:%.*]] = bitcast i16* [[T0]] to i8* -// CHECK-NEXT: [[T5:%.*]] = bitcast i16* [[T2]] to i8* -// CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* [[T4]], i8* [[T5]], i64 8, i32 8, i1 false) -// CHECK-NEXT: ret void - // CHECK-LABEL: define linkonce_odr void @_ZN6PR66281BC2ERKS0_(%"struct.PR6628::B"* %this, %"struct.PR6628::B"* dereferenceable({{[0-9]+}})) unnamed_addr // CHECK: call void @_ZN6PR66281TC1Ev // CHECK: call void @_ZN6PR66281TC1Ev @@ -174,6 +162,18 @@ void f(B b1) { // CHECK: call void @_ZN6PR66281AC1ERKS0_RKNS_1TES5_ // CHECK: call void @_ZN6PR66281TD1Ev // CHECK: call void @_ZN6PR66281TD1Ev + +// CHECK-LABEL: define linkonce_odr void @_ZN12rdar138169401AC2ERKS0_( +// CHECK: [[THIS:%.*]] = load [[A]]** +// CHECK-NEXT: [[T0:%.*]] = bitcast [[A]]* [[THIS]] to i32 (...)*** +// CHECK-NEXT: store i32 (...)** bitcast (i8** getelementptr inbounds ([4 x i8*]* @_ZTVN12rdar138169401AE, i64 0, i64 2) to i32 (...)**), i32 (...)*** [[T0]] +// CHECK-NEXT: [[T0:%.*]] = getelementptr inbounds [[A]]* [[THIS]], i32 0, i32 1 +// CHECK-NEXT: [[OTHER:%.*]] = load [[A]]** +// CHECK-NEXT: [[T2:%.*]] = getelementptr inbounds [[A]]* [[OTHER]], i32 0, i32 1 +// CHECK-NEXT: [[T4:%.*]] = bitcast i16* [[T0]] to i8* +// CHECK-NEXT: [[T5:%.*]] = bitcast i16* [[T2]] to i8* +// CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* [[T4]], i8* [[T5]], i64 8, i32 8, i1 false) +// CHECK-NEXT: ret void } // rdar://13816940 |
