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authorJustin Bogner <mail@justinbogner.com>2014-04-23 01:50:10 +0000
committerJustin Bogner <mail@justinbogner.com>2014-04-23 01:50:10 +0000
commit0cbb6d86c810820372d7372cf1aa6e55bedd6d91 (patch)
treef1fe2386ea189a294d8dd3efb7693250fc317440 /clang/test/CodeGenCXX/arm.cpp
parentfeb1148ed6e3843bca023d83051004a86175e190 (diff)
downloadbcm5719-llvm-0cbb6d86c810820372d7372cf1aa6e55bedd6d91.tar.gz
bcm5719-llvm-0cbb6d86c810820372d7372cf1aa6e55bedd6d91.zip
CodeGen: Unify handling guard variables in the Itanium C++ ABI
We previously treated ARM separately from the generic Itanium ABI for initializing guard variables. This code duplication led to things like the ARM path missing the memory barrier for threadsafe handling, and a highly misleading comment about how we were (mis)using the generic ABI for ARM64 when really it went through the ARM codepath. This unifies the two code paths. Functionally, this changes the ARM and ARM64 codepath to use one byte loads instead of 4 and 8, respectively, and adds the missing atomic acquire to these loads. Other architectures are unchanged. llvm-svn: 206937
Diffstat (limited to 'clang/test/CodeGenCXX/arm.cpp')
-rw-r--r--clang/test/CodeGenCXX/arm.cpp12
1 files changed, 6 insertions, 6 deletions
diff --git a/clang/test/CodeGenCXX/arm.cpp b/clang/test/CodeGenCXX/arm.cpp
index 2790199446d..b8d95991e2d 100644
--- a/clang/test/CodeGenCXX/arm.cpp
+++ b/clang/test/CodeGenCXX/arm.cpp
@@ -292,9 +292,9 @@ namespace test7 {
// CHECK-LABEL: define void @_ZN5test74testEv()
void test() {
- // CHECK: [[T0:%.*]] = load i32* @_ZGVZN5test74testEvE1x
- // CHECK-NEXT: [[T1:%.*]] = and i32 [[T0]], 1
- // CHECK-NEXT: [[T2:%.*]] = icmp eq i32 [[T1]], 0
+ // CHECK: [[T0:%.*]] = load atomic i8* bitcast (i32* @_ZGVZN5test74testEvE1x to i8*) acquire, align 1
+ // CHECK-NEXT: [[T1:%.*]] = and i8 [[T0]], 1
+ // CHECK-NEXT: [[T2:%.*]] = icmp eq i8 [[T1]], 0
// CHECK-NEXT: br i1 [[T2]]
// -> fallthrough, end
// CHECK: [[T3:%.*]] = call i32 @__cxa_guard_acquire(i32* @_ZGVZN5test74testEvE1x)
@@ -327,9 +327,9 @@ namespace test8 {
// CHECK-LABEL: define void @_ZN5test84testEv()
void test() {
- // CHECK: [[T0:%.*]] = load i32* @_ZGVZN5test84testEvE1x
- // CHECK-NEXT: [[T1:%.*]] = and i32 [[T0]], 1
- // CHECK-NEXT: [[T2:%.*]] = icmp eq i32 [[T1]], 0
+ // CHECK: [[T0:%.*]] = load atomic i8* bitcast (i32* @_ZGVZN5test84testEvE1x to i8*) acquire, align 1
+ // CHECK-NEXT: [[T1:%.*]] = and i8 [[T0]], 1
+ // CHECK-NEXT: [[T2:%.*]] = icmp eq i8 [[T1]], 0
// CHECK-NEXT: br i1 [[T2]]
// -> fallthrough, end
// CHECK: [[T3:%.*]] = call i32 @__cxa_guard_acquire(i32* @_ZGVZN5test84testEvE1x)
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