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| author | Erich Keane <erich.keane@intel.com> | 2018-09-10 21:57:53 +0000 |
|---|---|---|
| committer | Erich Keane <erich.keane@intel.com> | 2018-09-10 21:57:53 +0000 |
| commit | 33428d98f7ffb26d98e3af3d28e7215e31bc1b69 (patch) | |
| tree | 6eeb37379b08fa239529182bbddb319652b81e3b /clang/test/CodeGen | |
| parent | c6a233a68a6d0d870bb3126083c85e6cb0b71390 (diff) | |
| download | bcm5719-llvm-33428d98f7ffb26d98e3af3d28e7215e31bc1b69.tar.gz bcm5719-llvm-33428d98f7ffb26d98e3af3d28e7215e31bc1b69.zip | |
Fix test regression in r341862
The commit updates when AES is enabled, but failed to update the tests.
This patch fixes them.
llvm-svn: 341871
Diffstat (limited to 'clang/test/CodeGen')
| -rw-r--r-- | clang/test/CodeGen/attr-target-x86.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/clang/test/CodeGen/attr-target-x86.c b/clang/test/CodeGen/attr-target-x86.c index ca544e4eaef..153cdb3e94c 100644 --- a/clang/test/CodeGen/attr-target-x86.c +++ b/clang/test/CodeGen/attr-target-x86.c @@ -49,7 +49,7 @@ int __attribute__((target("arch=lakemont,mmx"))) use_before_def(void) { // CHECK: lake{{.*}} #7 // CHECK: use_before_def{{.*}} #7 // CHECK: #0 = {{.*}}"target-cpu"="i686" "target-features"="+x87" -// CHECK: #1 = {{.*}}"target-cpu"="ivybridge" "target-features"="+aes,+avx,+cx16,+f16c,+fsgsbase,+fxsr,+mmx,+pclmul,+popcnt,+rdrnd,+sahf,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+ssse3,+x87,+xsave,+xsaveopt" +// CHECK: #1 = {{.*}}"target-cpu"="ivybridge" "target-features"="+avx,+cx16,+f16c,+fsgsbase,+fxsr,+mmx,+pclmul,+popcnt,+rdrnd,+sahf,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+ssse3,+x87,+xsave,+xsaveopt" // CHECK: #2 = {{.*}}"target-cpu"="i686" "target-features"="+x87,-aes,-avx,-avx2,-avx512bitalg,-avx512bw,-avx512cd,-avx512dq,-avx512er,-avx512f,-avx512ifma,-avx512pf,-avx512vbmi,-avx512vbmi2,-avx512vl,-avx512vnni,-avx512vpopcntdq,-f16c,-fma,-fma4,-gfni,-pclmul,-sha,-sse2,-sse3,-sse4.1,-sse4.2,-sse4a,-ssse3,-vaes,-vpclmulqdq,-xop,-xsave,-xsaveopt" // CHECK: #3 = {{.*}}"target-cpu"="i686" "target-features"="+mmx,+popcnt,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+ssse3,+x87" // CHECK: #4 = {{.*}}"target-cpu"="i686" "target-features"="+x87,-avx,-avx2,-avx512bitalg,-avx512bw,-avx512cd,-avx512dq,-avx512er,-avx512f,-avx512ifma,-avx512pf,-avx512vbmi,-avx512vbmi2,-avx512vl,-avx512vnni,-avx512vpopcntdq,-f16c,-fma,-fma4,-sse4.1,-sse4.2,-vaes,-vpclmulqdq,-xop,-xsave,-xsaveopt" |
