[PowerPC] ABI support for the QPX vector instruction set

Support for the QPX vector instruction set, used on the IBM BG/Q supercomputer,
has recently been added to the LLVM PowerPC backend. This vector instruction
set requires some ABI modifications because the ABI on the BG/Q expects
<4 x double> vectors to be provided with 32-byte stack alignment, and to be
handled as native vector types (similar to how Altivec vectors are handled on
mainline PPC systems). I've named this ABI variant elfv1-qpx, have made this
the default ABI when QPX is supported, and have updated the ABI handling code
to provide QPX vectors with the correct stack alignment and associated
register-assignment logic.

llvm-svn: 231960

2 files changed, 33 insertions, 0 deletions

diff --git a/clang/test/CodeGen/ppc64-elf-abi.c b/clang/test/CodeGen/ppc64-elf-abi.c
index 0dd183e2a6d..c2b6abc9dfd 100644
--- a/clang/test/CodeGen/ppc64-elf-abi.c
+++ b/clang/test/CodeGen/ppc64-elf-abi.c
@@ -7,6 +7,8 @@
 // RUN: %clang_cc1 -triple powerpc64-unknown-linux-gnu -emit-llvm -o - %s \
 // RUN:   -target-abi elfv1 | FileCheck %s --check-prefix=CHECK-ELFv1
 // RUN: %clang_cc1 -triple powerpc64-unknown-linux-gnu -emit-llvm -o - %s \
+// RUN:   -target-abi elfv1-qpx | FileCheck %s --check-prefix=CHECK-ELFv1
+// RUN: %clang_cc1 -triple powerpc64-unknown-linux-gnu -emit-llvm -o - %s \
 // RUN:   -target-abi elfv2 | FileCheck %s --check-prefix=CHECK-ELFv2
 // RUN: %clang_cc1 -triple powerpc64le-unknown-linux-gnu -emit-llvm -o - %s \
 // RUN:   | FileCheck %s --check-prefix=CHECK-ELFv2
@@ -27,6 +29,8 @@ struct fab func_fab(struct fab x) { return x; }
 // RUN: %clang_cc1 -triple powerpc64-unknown-linux-gnu -S -o - %s \
 // RUN:   -target-abi elfv1 | FileCheck %s --check-prefix=CHECK-ASM-ELFv1
 // RUN: %clang_cc1 -triple powerpc64-unknown-linux-gnu -S -o - %s \
+// RUN:   -target-abi elfv1-qpx | FileCheck %s --check-prefix=CHECK-ASM-ELFv1
+// RUN: %clang_cc1 -triple powerpc64-unknown-linux-gnu -S -o - %s \
 // RUN:   -target-abi elfv2 | FileCheck %s --check-prefix=CHECK-ASM-ELFv2
 // RUN: %clang_cc1 -triple powerpc64le-unknown-linux-gnu -S -o - %s \
 // RUN:   | FileCheck %s --check-prefix=CHECK-ASM-ELFv2
diff --git a/clang/test/CodeGen/ppc64-qpx-vector.c b/clang/test/CodeGen/ppc64-qpx-vector.c
new file mode 100644
index 00000000000..c42d4b36a83
--- /dev/null
+++ b/clang/test/CodeGen/ppc64-qpx-vector.c
@@ -0,0 +1,29 @@
+// RUN: %clang_cc1 -triple powerpc64-unknown-linux-gnu -emit-llvm -o - %s | FileCheck %s -check-prefix=ALL -check-prefix=NORMAL
+// RUN: %clang_cc1 -triple powerpc64-unknown-linux-gnu -emit-llvm -o - -target-abi elfv1-qpx %s | FileCheck %s -check-prefix=ALL -check-prefix=QPX
+
+typedef float v4sf __attribute__((vector_size(16)));
+typedef double v4df __attribute__((vector_size(32)));
+
+struct ssf { v4sf v; };
+struct sdf { v4df v; };
+
+struct ssf2 { v4sf v[2]; };
+struct sdf2 { v4df v[2]; };
+
+v4sf foo1(struct ssf a, v4sf b, struct ssf2 c) {
+  return a.v + b;
+}
+
+// ALL-LABEL: define <4 x float> @foo1(<4 x float> inreg %a.coerce, <4 x float> %b, [2 x i128] %c.coerce)
+// ALL: ret <4 x float>
+
+v4df foo2(struct sdf a, v4df b, struct sdf2 c) {
+  return a.v + b;
+}
+
+// QPX-LABEL: define <4 x double> @foo2(<4 x double> inreg %a.coerce, <4 x double> %b, [2 x i256] %c.coerce)
+// QPX: ret <4 x double>
+
+// NORMAL-LABEL: define void @foo2(<4 x double>* noalias sret %agg.result, [2 x i128] %a.coerce, <4 x double>*, [4 x i128] %c.coerce)
+// NORMAL: ret void
+