[X86, AVX2] Replace inserti128 and extracti128 intrinsics with generic shuffles

This is nearly identical to the v*f128_si256 parts of r231792 and r232052.

AVX2 introduced proper integer variants of the hacked integer insert/extract
C intrinsics that were created for this same functionality with AVX1.

This should complete the front end fixes for insert/extract128 intrinsics. 
Corresponding LLVM patch to follow.

llvm-svn: 232109

1 files changed, 32 insertions, 4 deletions

diff --git a/clang/test/CodeGen/avx2-builtins.c b/clang/test/CodeGen/avx2-builtins.c
index 371f9c6ee24..fa5a27c7d3b 100644
--- a/clang/test/CodeGen/avx2-builtins.c
+++ b/clang/test/CodeGen/avx2-builtins.c
@@ -695,16 +695,44 @@ __m256i test_mm256_permute2x128_si256(__m256i a, __m256i b) {
   return _mm256_permute2x128_si256(a, b, 0x31);
 }
 
-__m128i test_mm256_extracti128_si256(__m256i a) {
-  // CHECK: @llvm.x86.avx2.vextracti128
+__m128i test_mm256_extracti128_si256_0(__m256i a) {
+  // CHECK-LABEL: @test_mm256_extracti128_si256_0
+  // CHECK: shufflevector{{.*}}<i32 0, i32 1>
+  return _mm256_extracti128_si256(a, 0);
+}
+
+__m128i test_mm256_extracti128_si256_1(__m256i a) {
+  // CHECK-LABEL: @test_mm256_extracti128_si256_1
+  // CHECK: shufflevector{{.*}}<i32 2, i32 3>
   return _mm256_extracti128_si256(a, 1);
 }
 
-__m256i test_mm256_inserti128_si256(__m256i a, __m128i b) {
-  // CHECK: @llvm.x86.avx2.vinserti128
+// Immediate should be truncated to one bit.
+__m128i test_mm256_extracti128_si256_2(__m256i a) {
+  // CHECK-LABEL: @test_mm256_extracti128_si256_2
+  // CHECK: shufflevector{{.*}}<i32 0, i32 1>
+  return _mm256_extracti128_si256(a, 2);
+}
+
+__m256i test_mm256_inserti128_si256_0(__m256i a, __m128i b) {
+  // CHECK-LABEL: @test_mm256_inserti128_si256_0
+  // CHECK: shufflevector{{.*}}<i32 4, i32 5, i32 2, i32 3>
+  return _mm256_inserti128_si256(a, b, 0);
+}
+
+__m256i test_mm256_inserti128_si256_1(__m256i a, __m128i b) {
+  // CHECK-LABEL: @test_mm256_inserti128_si256_1
+  // CHECK: shufflevector{{.*}}<i32 0, i32 1, i32 4, i32 5>
   return _mm256_inserti128_si256(a, b, 1);
 }
 
+// Immediate should be truncated to one bit.
+__m256i test_mm256_inserti128_si256_2(__m256i a, __m128i b) {
+  // CHECK-LABEL: @test_mm256_inserti128_si256_2
+  // CHECK: shufflevector{{.*}}<i32 4, i32 5, i32 2, i32 3>
+  return _mm256_inserti128_si256(a, b, 2);
+}
+
 __m256i test_mm256_maskload_epi32(int const *a, __m256i m) {
   // CHECK: @llvm.x86.avx2.maskload.d.256
   return _mm256_maskload_epi32(a, m);