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authorJF Bastien <jfb@google.com>2013-07-17 05:46:46 +0000
committerJF Bastien <jfb@google.com>2013-07-17 05:46:46 +0000
commitcd4c64d2347e2fd92ab2a2a32e3c315cbdb3fc20 (patch)
tree2ec6b4f3666e7633fc72a6a5e32a8947c2abdc6b /clang/test/CodeGen/volatile-1.c
parent40f76d583030084c557354ec4905dab45cb5cefe (diff)
downloadbcm5719-llvm-cd4c64d2347e2fd92ab2a2a32e3c315cbdb3fc20.tar.gz
bcm5719-llvm-cd4c64d2347e2fd92ab2a2a32e3c315cbdb3fc20.zip
Fix ARMFastISel::ARMEmitIntExt shift emission
My patch 'r183551 - ARM FastISel integer sext/zext improvements' was incorrect when emitting ARM register-immediate ASR, LSL, LSR instructions: they are pseudo-instructions in ARMInstrInfo.td and I should have used MOVsi instead. This is not an issue when code is generated through a .s file, but is an issue when generated straight to a .o (-filetype=obj). llvm-svn: 186489
Diffstat (limited to 'clang/test/CodeGen/volatile-1.c')
0 files changed, 0 insertions, 0 deletions
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