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| author | Sanjay Patel <spatel@rotateright.com> | 2018-06-05 23:34:45 +0000 |
|---|---|---|
| committer | Sanjay Patel <spatel@rotateright.com> | 2018-06-05 23:34:45 +0000 |
| commit | 59313be8d3389918d0a1bf704bcbdd889c073ffc (patch) | |
| tree | bcbbfe3bffbf20e582318ed609de8a66352d31cd /clang/test/CodeGen/vector.c | |
| parent | 6b5b5ce06c2d294d093a3ad782e7546d5fccd25b (diff) | |
| download | bcm5719-llvm-59313be8d3389918d0a1bf704bcbdd889c073ffc.tar.gz bcm5719-llvm-59313be8d3389918d0a1bf704bcbdd889c073ffc.zip | |
[CodeGen] assume max/default throughput for unspecified instructions
This is a fix for the problem arising in D47374 (PR37678):
https://bugs.llvm.org/show_bug.cgi?id=37678
We may not have throughput info because it's not specified in the model
or it's not available with variant scheduling, so assume that those
instructions can execute/complete at max-issue-width.
Differential Revision: https://reviews.llvm.org/D47723
llvm-svn: 334055
Diffstat (limited to 'clang/test/CodeGen/vector.c')
0 files changed, 0 insertions, 0 deletions
