diff options
| author | Craig Topper <craig.topper@intel.com> | 2019-07-10 17:11:23 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@intel.com> | 2019-07-10 17:11:23 +0000 |
| commit | f9cb127ca92fddeca203ce01592f10e9a53ef077 (patch) | |
| tree | c0b88f0b59f1af54a8bca808c6e6b8051b3032d6 /clang/test/CodeGen/sse2-builtins.c | |
| parent | ab5a30ac9dcec8c92d8e964b0701c6f164e3be88 (diff) | |
| download | bcm5719-llvm-f9cb127ca92fddeca203ce01592f10e9a53ef077.tar.gz bcm5719-llvm-f9cb127ca92fddeca203ce01592f10e9a53ef077.zip | |
[X86] Add guards to some of the x86 intrinsic tests to skip 64-bit mode only intrinsics when compiled for 32-bit mode.
All the command lines are for 64-bit mode, but sometimes I compile
the tests in 32-bit mode to see what assembly we get and we need
to skip these to do that.
llvm-svn: 365668
Diffstat (limited to 'clang/test/CodeGen/sse2-builtins.c')
| -rw-r--r-- | clang/test/CodeGen/sse2-builtins.c | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/clang/test/CodeGen/sse2-builtins.c b/clang/test/CodeGen/sse2-builtins.c index acf4b20dd14..280640c267c 100644 --- a/clang/test/CodeGen/sse2-builtins.c +++ b/clang/test/CodeGen/sse2-builtins.c @@ -500,11 +500,13 @@ int test_mm_cvtsd_si32(__m128d A) { return _mm_cvtsd_si32(A); } +#ifdef __x86_64__ long long test_mm_cvtsd_si64(__m128d A) { // CHECK-LABEL: test_mm_cvtsd_si64 // CHECK: call i64 @llvm.x86.sse2.cvtsd2si64(<2 x double> %{{.*}}) return _mm_cvtsd_si64(A); } +#endif __m128 test_mm_cvtsd_ss(__m128 A, __m128d B) { // CHECK-LABEL: test_mm_cvtsd_ss @@ -518,11 +520,13 @@ int test_mm_cvtsi128_si32(__m128i A) { return _mm_cvtsi128_si32(A); } +#ifdef __x86_64__ long long test_mm_cvtsi128_si64(__m128i A) { // CHECK-LABEL: test_mm_cvtsi128_si64 // CHECK: extractelement <2 x i64> %{{.*}}, i32 0 return _mm_cvtsi128_si64(A); } +#endif __m128d test_mm_cvtsi32_sd(__m128d A, int B) { // CHECK-LABEL: test_mm_cvtsi32_sd @@ -540,6 +544,7 @@ __m128i test_mm_cvtsi32_si128(int A) { return _mm_cvtsi32_si128(A); } +#ifdef __x86_64__ __m128d test_mm_cvtsi64_sd(__m128d A, long long B) { // CHECK-LABEL: test_mm_cvtsi64_sd // CHECK: sitofp i64 %{{.*}} to double @@ -553,6 +558,7 @@ __m128i test_mm_cvtsi64_si128(long long A) { // CHECK: insertelement <2 x i64> %{{.*}}, i64 0, i32 1 return _mm_cvtsi64_si128(A); } +#endif __m128d test_mm_cvtss_sd(__m128d A, __m128 B) { // CHECK-LABEL: test_mm_cvtss_sd @@ -580,11 +586,13 @@ int test_mm_cvttsd_si32(__m128d A) { return _mm_cvttsd_si32(A); } +#ifdef __x86_64__ long long test_mm_cvttsd_si64(__m128d A) { // CHECK-LABEL: test_mm_cvttsd_si64 // CHECK: call i64 @llvm.x86.sse2.cvttsd2si64(<2 x double> %{{.*}}) return _mm_cvttsd_si64(A); } +#endif __m128d test_mm_div_pd(__m128d A, __m128d B) { // CHECK-LABEL: test_mm_div_pd @@ -1492,11 +1500,13 @@ void test_mm_stream_si32(int *A, int B) { _mm_stream_si32(A, B); } +#ifdef __x86_64__ void test_mm_stream_si64(long long *A, long long B) { // CHECK-LABEL: test_mm_stream_si64 // CHECK: store i64 %{{.*}}, i64* %{{.*}}, align 1, !nontemporal _mm_stream_si64(A, B); } +#endif void test_mm_stream_si128(__m128i *A, __m128i B) { // CHECK-LABEL: test_mm_stream_si128 |
