summaryrefslogtreecommitdiffstats
path: root/clang/test/CodeGen/sse-builtins.c
diff options
context:
space:
mode:
authorSanjay Patel <spatel@rotateright.com>2016-06-15 21:20:04 +0000
committerSanjay Patel <spatel@rotateright.com>2016-06-15 21:20:04 +0000
commit280cfd1a690468577fdffa8f15321be42eae201a (patch)
tree48f1412e6edfed1d7cf10c9f4f4f1fc2a44bda8d /clang/test/CodeGen/sse-builtins.c
parent062c26f1f0133f8dd5fb657eb1fffef3c1274be4 (diff)
downloadbcm5719-llvm-280cfd1a690468577fdffa8f15321be42eae201a.tar.gz
bcm5719-llvm-280cfd1a690468577fdffa8f15321be42eae201a.zip
[x86] translate SSE packed FP comparison builtins to IR
As noted in the code comment, a potential follow-on would be to remove the builtins themselves. Other than ord/unord, this already works as expected. Eg: typedef float v4sf __attribute__((__vector_size__(16))); v4sf fcmpgt(v4sf a, v4sf b) { return a > b; } Differential Revision: http://reviews.llvm.org/D21268 llvm-svn: 272840
Diffstat (limited to 'clang/test/CodeGen/sse-builtins.c')
-rw-r--r--clang/test/CodeGen/sse-builtins.c60
1 files changed, 48 insertions, 12 deletions
diff --git a/clang/test/CodeGen/sse-builtins.c b/clang/test/CodeGen/sse-builtins.c
index 586be94da6f..a6c5c1a0a16 100644
--- a/clang/test/CodeGen/sse-builtins.c
+++ b/clang/test/CodeGen/sse-builtins.c
@@ -37,7 +37,10 @@ __m128 test_mm_andnot_ps(__m128 A, __m128 B) {
__m128 test_mm_cmpeq_ps(__m128 __a, __m128 __b) {
// CHECK-LABEL: @test_mm_cmpeq_ps
- // CHECK: @llvm.x86.sse.cmp.ps(<4 x float> %{{.*}}, <4 x float> %{{.*}}, i8 0)
+ // CHECK: [[CMP:%.*]] = fcmp oeq <4 x float>
+ // CHECK-NEXT: [[SEXT:%.*]] = sext <4 x i1> [[CMP]] to <4 x i32>
+ // CHECK-NEXT: [[BC:%.*]] = bitcast <4 x i32> [[SEXT]] to <4 x float>
+ // CHECK-NEXT: ret <4 x float> [[BC]]
return _mm_cmpeq_ps(__a, __b);
}
@@ -49,7 +52,10 @@ __m128 test_mm_cmpeq_ss(__m128 __a, __m128 __b) {
__m128 test_mm_cmpge_ps(__m128 __a, __m128 __b) {
// CHECK-LABEL: @test_mm_cmpge_ps
- // CHECK: @llvm.x86.sse.cmp.ps(<4 x float> %{{.*}}, <4 x float> %{{.*}}, i8 2)
+ // CHECK: [[CMP:%.*]] = fcmp ole <4 x float>
+ // CHECK-NEXT: [[SEXT:%.*]] = sext <4 x i1> [[CMP]] to <4 x i32>
+ // CHECK-NEXT: [[BC:%.*]] = bitcast <4 x i32> [[SEXT]] to <4 x float>
+ // CHECK-NEXT: ret <4 x float> [[BC]]
return _mm_cmpge_ps(__a, __b);
}
@@ -62,7 +68,10 @@ __m128 test_mm_cmpge_ss(__m128 __a, __m128 __b) {
__m128 test_mm_cmpgt_ps(__m128 __a, __m128 __b) {
// CHECK-LABEL: @test_mm_cmpgt_ps
- // CHECK: @llvm.x86.sse.cmp.ps(<4 x float> %{{.*}}, <4 x float> %{{.*}}, i8 1)
+ // CHECK: [[CMP:%.*]] = fcmp olt <4 x float>
+ // CHECK-NEXT: [[SEXT:%.*]] = sext <4 x i1> [[CMP]] to <4 x i32>
+ // CHECK-NEXT: [[BC:%.*]] = bitcast <4 x i32> [[SEXT]] to <4 x float>
+ // CHECK-NEXT: ret <4 x float> [[BC]]
return _mm_cmpgt_ps(__a, __b);
}
@@ -75,7 +84,10 @@ __m128 test_mm_cmpgt_ss(__m128 __a, __m128 __b) {
__m128 test_mm_cmple_ps(__m128 __a, __m128 __b) {
// CHECK-LABEL: @test_mm_cmple_ps
- // CHECK: @llvm.x86.sse.cmp.ps(<4 x float> %{{.*}}, <4 x float> %{{.*}}, i8 2)
+ // CHECK: [[CMP:%.*]] = fcmp ole <4 x float>
+ // CHECK-NEXT: [[SEXT:%.*]] = sext <4 x i1> [[CMP]] to <4 x i32>
+ // CHECK-NEXT: [[BC:%.*]] = bitcast <4 x i32> [[SEXT]] to <4 x float>
+ // CHECK-NEXT: ret <4 x float> [[BC]]
return _mm_cmple_ps(__a, __b);
}
@@ -87,7 +99,10 @@ __m128 test_mm_cmple_ss(__m128 __a, __m128 __b) {
__m128 test_mm_cmplt_ps(__m128 __a, __m128 __b) {
// CHECK-LABEL: @test_mm_cmplt_ps
- // CHECK: @llvm.x86.sse.cmp.ps(<4 x float> %{{.*}}, <4 x float> %{{.*}}, i8 1)
+ // CHECK: [[CMP:%.*]] = fcmp olt <4 x float>
+ // CHECK-NEXT: [[SEXT:%.*]] = sext <4 x i1> [[CMP]] to <4 x i32>
+ // CHECK-NEXT: [[BC:%.*]] = bitcast <4 x i32> [[SEXT]] to <4 x float>
+ // CHECK-NEXT: ret <4 x float> [[BC]]
return _mm_cmplt_ps(__a, __b);
}
@@ -99,7 +114,10 @@ __m128 test_mm_cmplt_ss(__m128 __a, __m128 __b) {
__m128 test_mm_cmpneq_ps(__m128 __a, __m128 __b) {
// CHECK-LABEL: @test_mm_cmpneq_ps
- // CHECK: @llvm.x86.sse.cmp.ps(<4 x float> %{{.*}}, <4 x float> %{{.*}}, i8 4)
+ // CHECK: [[CMP:%.*]] = fcmp une <4 x float>
+ // CHECK-NEXT: [[SEXT:%.*]] = sext <4 x i1> [[CMP]] to <4 x i32>
+ // CHECK-NEXT: [[BC:%.*]] = bitcast <4 x i32> [[SEXT]] to <4 x float>
+ // CHECK-NEXT: ret <4 x float> [[BC]]
return _mm_cmpneq_ps(__a, __b);
}
@@ -111,7 +129,10 @@ __m128 test_mm_cmpneq_ss(__m128 __a, __m128 __b) {
__m128 test_mm_cmpnge_ps(__m128 __a, __m128 __b) {
// CHECK-LABEL: @test_mm_cmpnge_ps
- // CHECK: @llvm.x86.sse.cmp.ps(<4 x float> %{{.*}}, <4 x float> %{{.*}}, i8 6)
+ // CHECK: [[CMP:%.*]] = fcmp ugt <4 x float>
+ // CHECK-NEXT: [[SEXT:%.*]] = sext <4 x i1> [[CMP]] to <4 x i32>
+ // CHECK-NEXT: [[BC:%.*]] = bitcast <4 x i32> [[SEXT]] to <4 x float>
+ // CHECK-NEXT: ret <4 x float> [[BC]]
return _mm_cmpnge_ps(__a, __b);
}
@@ -124,7 +145,10 @@ __m128 test_mm_cmpnge_ss(__m128 __a, __m128 __b) {
__m128 test_mm_cmpngt_ps(__m128 __a, __m128 __b) {
// CHECK-LABEL: @test_mm_cmpngt_ps
- // CHECK: @llvm.x86.sse.cmp.ps(<4 x float> %{{.*}}, <4 x float> %{{.*}}, i8 5)
+ // CHECK: [[CMP:%.*]] = fcmp uge <4 x float>
+ // CHECK-NEXT: [[SEXT:%.*]] = sext <4 x i1> [[CMP]] to <4 x i32>
+ // CHECK-NEXT: [[BC:%.*]] = bitcast <4 x i32> [[SEXT]] to <4 x float>
+ // CHECK-NEXT: ret <4 x float> [[BC]]
return _mm_cmpngt_ps(__a, __b);
}
@@ -137,7 +161,10 @@ __m128 test_mm_cmpngt_ss(__m128 __a, __m128 __b) {
__m128 test_mm_cmpnle_ps(__m128 __a, __m128 __b) {
// CHECK-LABEL: @test_mm_cmpnle_ps
- // CHECK: @llvm.x86.sse.cmp.ps(<4 x float> %{{.*}}, <4 x float> %{{.*}}, i8 6)
+ // CHECK: [[CMP:%.*]] = fcmp ugt <4 x float>
+ // CHECK-NEXT: [[SEXT:%.*]] = sext <4 x i1> [[CMP]] to <4 x i32>
+ // CHECK-NEXT: [[BC:%.*]] = bitcast <4 x i32> [[SEXT]] to <4 x float>
+ // CHECK-NEXT: ret <4 x float> [[BC]]
return _mm_cmpnle_ps(__a, __b);
}
@@ -149,7 +176,10 @@ __m128 test_mm_cmpnle_ss(__m128 __a, __m128 __b) {
__m128 test_mm_cmpnlt_ps(__m128 __a, __m128 __b) {
// CHECK-LABEL: @test_mm_cmpnlt_ps
- // CHECK: @llvm.x86.sse.cmp.ps(<4 x float> %{{.*}}, <4 x float> %{{.*}}, i8 5)
+ // CHECK: [[CMP:%.*]] = fcmp uge <4 x float>
+ // CHECK-NEXT: [[SEXT:%.*]] = sext <4 x i1> [[CMP]] to <4 x i32>
+ // CHECK-NEXT: [[BC:%.*]] = bitcast <4 x i32> [[SEXT]] to <4 x float>
+ // CHECK-NEXT: ret <4 x float> [[BC]]
return _mm_cmpnlt_ps(__a, __b);
}
@@ -161,7 +191,10 @@ __m128 test_mm_cmpnlt_ss(__m128 __a, __m128 __b) {
__m128 test_mm_cmpord_ps(__m128 __a, __m128 __b) {
// CHECK-LABEL: @test_mm_cmpord_ps
- // CHECK: @llvm.x86.sse.cmp.ps(<4 x float> %{{.*}}, <4 x float> %{{.*}}, i8 7)
+ // CHECK: [[CMP:%.*]] = fcmp ord <4 x float>
+ // CHECK-NEXT: [[SEXT:%.*]] = sext <4 x i1> [[CMP]] to <4 x i32>
+ // CHECK-NEXT: [[BC:%.*]] = bitcast <4 x i32> [[SEXT]] to <4 x float>
+ // CHECK-NEXT: ret <4 x float> [[BC]]
return _mm_cmpord_ps(__a, __b);
}
@@ -173,7 +206,10 @@ __m128 test_mm_cmpord_ss(__m128 __a, __m128 __b) {
__m128 test_mm_cmpunord_ps(__m128 __a, __m128 __b) {
// CHECK-LABEL: @test_mm_cmpunord_ps
- // CHECK: @llvm.x86.sse.cmp.ps(<4 x float> %{{.*}}, <4 x float> %{{.*}}, i8 3)
+ // CHECK: [[CMP:%.*]] = fcmp uno <4 x float>
+ // CHECK-NEXT: [[SEXT:%.*]] = sext <4 x i1> [[CMP]] to <4 x i32>
+ // CHECK-NEXT: [[BC:%.*]] = bitcast <4 x i32> [[SEXT]] to <4 x float>
+ // CHECK-NEXT: ret <4 x float> [[BC]]
return _mm_cmpunord_ps(__a, __b);
}
OpenPOWER on IntegriCloud