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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2019-01-26 01:42:13 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2019-01-26 01:42:13 +0000 |
| commit | cdc201fcdea869c6bd6290bd2611714eb195db0c (patch) | |
| tree | dc09b2b6c7a60f8379495edf412ffa4bfd5e8256 /clang/test/CodeGen/ms-inline-asm-64.c | |
| parent | bb01a098b15f1a87fee0f8882c28e6b2141eadda (diff) | |
| download | bcm5719-llvm-cdc201fcdea869c6bd6290bd2611714eb195db0c.tar.gz bcm5719-llvm-cdc201fcdea869c6bd6290bd2611714eb195db0c.zip | |
GlobalISel: Fix address space limit in LLT
The IR enforced limit for the address space is 24-bits, but LLT was
only using 23-bits. Additionally, the argument to the constructor was
truncating to 16-bits.
A similar problem still exists for the number of vector elements. The
IR enforces no limit, so if you try to use a vector with > 65535
elements the IRTranslator asserts in the LLT constructor.
llvm-svn: 352264
Diffstat (limited to 'clang/test/CodeGen/ms-inline-asm-64.c')
0 files changed, 0 insertions, 0 deletions
