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authorAkira Hatanaka <ahatanaka@mips.com>2012-05-11 21:56:58 +0000
committerAkira Hatanaka <ahatanaka@mips.com>2012-05-11 21:56:58 +0000
commit8ab86cb34446dfc147d3faf27074d49cdda6f3f0 (patch)
treeb79ff4a02b686fa6e29b0bf34f004ac0e8e43a30 /clang/test/CodeGen/mips64-class-return.cpp
parent393f432ddf68a63b1461510dcf2f09c5319c526a (diff)
downloadbcm5719-llvm-8ab86cb34446dfc147d3faf27074d49cdda6f3f0.tar.gz
bcm5719-llvm-8ab86cb34446dfc147d3faf27074d49cdda6f3f0.zip
Coerce byval aggregate arguments to integers whose size matches the integer
register size of the target architecture. llvm-svn: 156650
Diffstat (limited to 'clang/test/CodeGen/mips64-class-return.cpp')
-rw-r--r--clang/test/CodeGen/mips64-class-return.cpp2
1 files changed, 1 insertions, 1 deletions
diff --git a/clang/test/CodeGen/mips64-class-return.cpp b/clang/test/CodeGen/mips64-class-return.cpp
index dc9ec0f5be4..8e32d5cbd6f 100644
--- a/clang/test/CodeGen/mips64-class-return.cpp
+++ b/clang/test/CodeGen/mips64-class-return.cpp
@@ -39,7 +39,7 @@ void foo3(D2 a0) {
gd2 = a0;
}
-// CHECK: define void @_Z4foo42D0(%class.D0* nocapture byval %a0)
+// CHECK: define void @_Z4foo42D0(i64 %a0.coerce0, i64 %a0.coerce1)
void foo4(D0 a0) {
gd0 = a0;
}
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