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authorDaniel Sanders <daniel.sanders@imgtec.com>2015-11-27 18:03:44 +0000
committerDaniel Sanders <daniel.sanders@imgtec.com>2015-11-27 18:03:44 +0000
commitbd3f47f5b53bcdf8bbd8c0afa86c3a6ed814e5fc (patch)
tree22ada3270b7ed24698e201dec0bdc11f925ebf9e /clang/test/CodeGen/mips-interrupt-attr.c
parent8f8eb8f545881c2a27e995086c1f0d8889f236dc (diff)
downloadbcm5719-llvm-bd3f47f5b53bcdf8bbd8c0afa86c3a6ed814e5fc.tar.gz
bcm5719-llvm-bd3f47f5b53bcdf8bbd8c0afa86c3a6ed814e5fc.zip
[mips] Interrupt attribute support.
Summary: This patch adds support for the interrupt attribute for mips32r2+. Patch by Simon Dardis. Reviewers: dsanders, aaron.ballman Subscribers: aaron.ballman, cfe-commits Differential Revision: http://reviews.llvm.org/D10802 llvm-svn: 254205
Diffstat (limited to 'clang/test/CodeGen/mips-interrupt-attr.c')
-rw-r--r--clang/test/CodeGen/mips-interrupt-attr.c64
1 files changed, 64 insertions, 0 deletions
diff --git a/clang/test/CodeGen/mips-interrupt-attr.c b/clang/test/CodeGen/mips-interrupt-attr.c
new file mode 100644
index 00000000000..df70b12b58f
--- /dev/null
+++ b/clang/test/CodeGen/mips-interrupt-attr.c
@@ -0,0 +1,64 @@
+// RUN: %clang_cc1 -triple mipsel-unknown-linux -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK
+
+void __attribute__ ((interrupt("vector=sw0")))
+isr_sw0 (void)
+{
+ // CHECK: define void @isr_sw0() [[SW0:#[0-9]+]]
+}
+
+void __attribute__ ((interrupt("vector=sw1")))
+isr_sw1 (void)
+{
+ // CHECK: define void @isr_sw1() [[SW1:#[0-9]+]]
+}
+
+void __attribute__ ((interrupt("vector=hw0")))
+isr_hw0 (void)
+{
+ // CHECK: define void @isr_hw0() [[HW0:#[0-9]+]]
+}
+
+void __attribute__ ((interrupt("vector=hw1")))
+isr_hw1 (void)
+{
+ // CHECK: define void @isr_hw1() [[HW1:#[0-9]+]]
+}
+
+void __attribute__ ((interrupt("vector=hw2")))
+isr_hw2 (void)
+{
+ // CHECK: define void @isr_hw2() [[HW2:#[0-9]+]]
+}
+
+void __attribute__ ((interrupt("vector=hw3")))
+isr_hw3 (void)
+{
+ // CHECK: define void @isr_hw3() [[HW3:#[0-9]+]]
+}
+
+void __attribute__ ((interrupt("vector=hw4")))
+isr_hw4 (void)
+{
+ // CHECK: define void @isr_hw4() [[HW4:#[0-9]+]]
+}
+
+void __attribute__ ((interrupt("vector=hw5")))
+isr_hw5 (void)
+{
+ // CHECK: define void @isr_hw5() [[HW5:#[0-9]+]]
+}
+
+void __attribute__ ((interrupt))
+isr_eic (void)
+{
+ // CHECK: define void @isr_eic() [[EIC:#[0-9]+]]
+}
+// CHECK: attributes [[SW0]] = { {{.*}} "interrupt"="sw0" {{.*}} }
+// CHECK: attributes [[SW1]] = { {{.*}} "interrupt"="sw1" {{.*}} }
+// CHECK: attributes [[HW0]] = { {{.*}} "interrupt"="hw0" {{.*}} }
+// CHECK: attributes [[HW1]] = { {{.*}} "interrupt"="hw1" {{.*}} }
+// CHECK: attributes [[HW2]] = { {{.*}} "interrupt"="hw2" {{.*}} }
+// CHECK: attributes [[HW3]] = { {{.*}} "interrupt"="hw3" {{.*}} }
+// CHECK: attributes [[HW4]] = { {{.*}} "interrupt"="hw4" {{.*}} }
+// CHECK: attributes [[HW5]] = { {{.*}} "interrupt"="hw5" {{.*}} }
+// CHECK: attributes [[EIC]] = { {{.*}} "interrupt"="eic" {{.*}} }
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