diff options
| author | Hrvoje Varga <Hrvoje.Varga@imgtec.com> | 2016-03-29 12:46:16 +0000 |
|---|---|---|
| committer | Hrvoje Varga <Hrvoje.Varga@imgtec.com> | 2016-03-29 12:46:16 +0000 |
| commit | 14c42eec54a7d48ed8c960a3c53e3da8076f9555 (patch) | |
| tree | 079ff4d54fd19af24d401f70d06df85fb0411c1a /clang/test/CodeGen/mips-inline-asm.c | |
| parent | 94c4897e5bfae25c1e83f625130755dfd01f3a67 (diff) | |
| download | bcm5719-llvm-14c42eec54a7d48ed8c960a3c53e3da8076f9555.tar.gz bcm5719-llvm-14c42eec54a7d48ed8c960a3c53e3da8076f9555.zip | |
Add additional Hi/Lo registers to Clang MipsTargetInfoBase
Differential Revision: http://reviews.llvm.org/D17378
llvm-svn: 264727
Diffstat (limited to 'clang/test/CodeGen/mips-inline-asm.c')
| -rw-r--r-- | clang/test/CodeGen/mips-inline-asm.c | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/clang/test/CodeGen/mips-inline-asm.c b/clang/test/CodeGen/mips-inline-asm.c index 2cfa41c98de..fa38663f387 100644 --- a/clang/test/CodeGen/mips-inline-asm.c +++ b/clang/test/CodeGen/mips-inline-asm.c @@ -17,3 +17,15 @@ void R () { asm("lw $1, %0" :: "R"(data)); // CHECK: call void asm sideeffect "lw $$1, $0", "*R,~{$1}"(i32* @data) } + +int additionalClobberedRegisters () { + int temp0; + asm volatile( + "mfhi %[temp0], $ac1 \n\t" + : [temp0]"=&r"(temp0) + : + : "memory", "t0", "t1", "$ac1hi", "$ac1lo", "$ac2hi", "$ac2lo", "$ac3hi", "$ac3lo" + ); + return 0; + // CHECK: call i32 asm sideeffect "mfhi $0, $$ac1 \0A\09", "=&r,~{memory},~{$8},~{$9},~{$ac1hi},~{$ac1lo},~{$ac2hi},~{$ac2lo},~{$ac3hi},~{$ac3lo},~{$1}" +} |
