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| author | Pengfei Wang <pengfei.wang@intel.com> | 2019-05-31 06:09:35 +0000 |
|---|---|---|
| committer | Pengfei Wang <pengfei.wang@intel.com> | 2019-05-31 06:09:35 +0000 |
| commit | cc3629d545a846fb3680f0e5b4691f3c829fd2dc (patch) | |
| tree | 74f394cde46c4f135e02ce63b57caee0e229bbd2 /clang/test/CodeGen/intel-avx512vlvp2intersect.c | |
| parent | 0d63cef180ccc6f5afab824cc784949acb137713 (diff) | |
| download | bcm5719-llvm-cc3629d545a846fb3680f0e5b4691f3c829fd2dc.tar.gz bcm5719-llvm-cc3629d545a846fb3680f0e5b4691f3c829fd2dc.zip | |
[X86] Add VP2INTERSECT instructions
Support intel AVX512 VP2INTERSECT instructions in clang
Patch by Xiang Zhang (xiangzhangllvm)
Differential Revision: https://reviews.llvm.org/D62367
llvm-svn: 362196
Diffstat (limited to 'clang/test/CodeGen/intel-avx512vlvp2intersect.c')
| -rw-r--r-- | clang/test/CodeGen/intel-avx512vlvp2intersect.c | 36 |
1 files changed, 36 insertions, 0 deletions
diff --git a/clang/test/CodeGen/intel-avx512vlvp2intersect.c b/clang/test/CodeGen/intel-avx512vlvp2intersect.c new file mode 100644 index 00000000000..c607a699692 --- /dev/null +++ b/clang/test/CodeGen/intel-avx512vlvp2intersect.c @@ -0,0 +1,36 @@ +// RUN: %clang_cc1 %s -ffreestanding -triple=x86_64-unknown-unknown -target-feature +avx512vp2intersect -target-feature +avx512vl -emit-llvm -o - -Wall -Werror | FileCheck %s +// RUN: %clang_cc1 %s -ffreestanding -triple=i386-unknown-unknown -target-feature +avx512vp2intersect -target-feature +avx512vl -emit-llvm -o - -Wall -Werror | FileCheck %s + +#include <immintrin.h> + +void test_mm256_2intersect_epi32(__m256i a, __m256i b, __mmask8 *m0, __mmask8 *m1) { +// CHECK-LABEL: test_mm256_2intersect_epi32 +// CHECK: call { <8 x i1>, <8 x i1> } @llvm.x86.avx512.vp2intersect.d.256(<8 x i32> %{{.*}}, <8 x i32> %{{.*}}) +// CHECK: extractvalue { <8 x i1>, <8 x i1> } %{{.*}}, 0 +// CHECK: extractvalue { <8 x i1>, <8 x i1> } %{{.*}}, 1 + _mm256_2intersect_epi32(a, b, m0, m1); +} + +void test_mm256_2intersect_epi64(__m256i a, __m256i b, __mmask8 *m0, __mmask8 *m1) { +// CHECK-LABEL: test_mm256_2intersect_epi64 +// CHECK: call { <4 x i1>, <4 x i1> } @llvm.x86.avx512.vp2intersect.q.256(<4 x i64> %{{.*}}, <4 x i64> %{{.*}}) +// CHECK: extractvalue { <4 x i1>, <4 x i1> } %{{.*}}, 0 +// CHECK: extractvalue { <4 x i1>, <4 x i1> } %{{.*}}, 1 + _mm256_2intersect_epi64(a, b, m0, m1); +} + +void test_mm_2intersect_epi32(__m128i a, __m128i b, __mmask8 *m0, __mmask8 *m1) { +// CHECK-LABEL: test_mm_2intersect_epi32 +// CHECK: call { <4 x i1>, <4 x i1> } @llvm.x86.avx512.vp2intersect.d.128(<4 x i32> %{{.*}}, <4 x i32> %{{.*}}) +// CHECK: extractvalue { <4 x i1>, <4 x i1> } %{{.*}}, 0 +// CHECK: extractvalue { <4 x i1>, <4 x i1> } %{{.*}}, 1 + _mm_2intersect_epi32(a, b, m0, m1); +} + +void test_mm_2intersect_epi64(__m128i a, __m128i b, __mmask8 *m0, __mmask8 *m1) { +// CHECK-LABEL: test_mm_2intersect_epi64 +// CHECK: call { <2 x i1>, <2 x i1> } @llvm.x86.avx512.vp2intersect.q.128(<2 x i64> %{{.*}}, <2 x i64> %{{.*}}) +// CHECK: extractvalue { <2 x i1>, <2 x i1> } %{{.*}}, 0 +// CHECK: extractvalue { <2 x i1>, <2 x i1> } %{{.*}}, 1 + _mm_2intersect_epi64(a, b, m0, m1); +} |
