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| author | Craig Topper <craig.topper@intel.com> | 2019-07-10 17:11:29 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@intel.com> | 2019-07-10 17:11:29 +0000 |
| commit | caf6b71ab2e6f9de3efe6ed71e9a21579b9994b6 (patch) | |
| tree | 32c886d66f32f46f4d063ca891fff1150189f6ac /clang/test/CodeGen/builtins-x86.c | |
| parent | f9cb127ca92fddeca203ce01592f10e9a53ef077 (diff) | |
| download | bcm5719-llvm-caf6b71ab2e6f9de3efe6ed71e9a21579b9994b6.tar.gz bcm5719-llvm-caf6b71ab2e6f9de3efe6ed71e9a21579b9994b6.zip | |
[X86] Change the IR sequence for _mm_storeh_pi and _mm_storel_pi to perform the store as a <2 x float> instead of i64.
This is similar to what we do for loadl_pi and loadh_pi.
llvm-svn: 365669
Diffstat (limited to 'clang/test/CodeGen/builtins-x86.c')
| -rw-r--r-- | clang/test/CodeGen/builtins-x86.c | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/clang/test/CodeGen/builtins-x86.c b/clang/test/CodeGen/builtins-x86.c index 056563931d6..61b9d53c74f 100644 --- a/clang/test/CodeGen/builtins-x86.c +++ b/clang/test/CodeGen/builtins-x86.c @@ -341,8 +341,6 @@ void f0() { #endif tmp_V2i = __builtin_ia32_cvttps2pi(tmp_V4f); (void) __builtin_ia32_maskmovq(tmp_V8c, tmp_V8c, tmp_cp); - (void) __builtin_ia32_storehps(tmp_V2ip, tmp_V4f); - (void) __builtin_ia32_storelps(tmp_V2ip, tmp_V4f); tmp_i = __builtin_ia32_movmskps(tmp_V4f); tmp_i = __builtin_ia32_pmovmskb(tmp_V8c); (void) __builtin_ia32_movntq(tmp_V1LLip, tmp_V1LLi); |
