[WebAssembly] __builtin_wasm_extract_lane_* builtins

Reviewers: aheejin, dschuff

Subscribers: sbc100, jgravelle-google, sunfish, kristina, cfe-commits

Differential Revision: https://reviews.llvm.org/D52852

llvm-svn: 343834

1 files changed, 70 insertions, 4 deletions

diff --git a/clang/test/CodeGen/builtins-wasm.c b/clang/test/CodeGen/builtins-wasm.c
index 775bca374bc..a96f6705f73 100644
--- a/clang/test/CodeGen/builtins-wasm.c
+++ b/clang/test/CodeGen/builtins-wasm.c
@@ -1,7 +1,21 @@
-// RUN: %clang_cc1 -triple wasm32-unknown-unknown -O3 -emit-llvm -o - %s \
-// RUN:   | FileCheck %s -check-prefix=WEBASSEMBLY32
-// RUN: %clang_cc1 -triple wasm64-unknown-unknown -O3 -emit-llvm -o - %s \
-// RUN:   | FileCheck %s -check-prefix=WEBASSEMBLY64
+// RUN: %clang_cc1 -triple wasm32-unknown-unknown -fno-lax-vector-conversions \
+// RUN:   -O3 -emit-llvm -o - %s \
+// RUN:   | FileCheck %s -check-prefixes WEBASSEMBLY,WEBASSEMBLY32
+// RUN: %clang_cc1 -triple wasm64-unknown-unknown -fno-lax-vector-conversions \
+// RUN:   -O3 -emit-llvm -o - %s \
+// RUN:   | FileCheck %s -check-prefixes WEBASSEMBLY,WEBASSEMBLY64
+
+// SIMD convenience types
+typedef char i8x16 __attribute((vector_size(16)));
+typedef short i16x8 __attribute((vector_size(16)));
+typedef int i32x4 __attribute((vector_size(16)));
+typedef long long i64x2 __attribute((vector_size(16)));
+typedef unsigned char u8x16 __attribute((vector_size(16)));
+typedef unsigned short u16x8 __attribute((vector_size(16)));
+typedef unsigned int u32x4 __attribute((vector_size(16)));
+typedef unsigned long long u64x2 __attribute((vector_size(16)));
+typedef float f32x4 __attribute((vector_size(16)));
+typedef double f64x2 __attribute((vector_size(16)));
 
 __SIZE_TYPE__ f0(void) {
   return __builtin_wasm_memory_size(0);
@@ -68,3 +82,55 @@ unsigned int f10(int *addr, int count) {
   // WEBASSEMBLY32: call i32 @llvm.wasm.atomic.notify(i32* %{{.*}}, i32 %{{.*}})
   // WEBASSEMBLY64: call i32 @llvm.wasm.atomic.notify(i32* %{{.*}}, i32 %{{.*}})
 }
+
+int f11(i8x16 v) {
+  return __builtin_wasm_extract_lane_s_i8x16(v, 13);
+  // WEBASSEMBLY: extractelement <16 x i8> %v, i32 13
+  // WEBASSEMBLY-NEXT: sext
+  // WEBASSEMBLY-NEXT: ret
+}
+
+int f12(i8x16 v) {
+  return __builtin_wasm_extract_lane_u_i8x16(v, 13);
+  // WEBASSEMBLY: extractelement <16 x i8> %v, i32 13
+  // WEBASSEMBLY-NEXT: zext
+  // WEBASSEMBLY-NEXT: ret
+}
+
+int f13(i16x8 v) {
+  return __builtin_wasm_extract_lane_s_i16x8(v, 7);
+  // WEBASSEMBLY: extractelement <8 x i16> %v, i32 7
+  // WEBASSEMBLY-NEXT: sext
+  // WEBASSEMBLY-NEXT: ret
+}
+
+int f14(i16x8 v) {
+  return __builtin_wasm_extract_lane_u_i16x8(v, 7);
+  // WEBASSEMBLY: extractelement <8 x i16> %v, i32 7
+  // WEBASSEMBLY-NEXT: zext
+  // WEBASSEMBLY-NEXT: ret
+}
+
+int f15(i32x4 v) {
+  return __builtin_wasm_extract_lane_i32x4(v, 3);
+  // WEBASSEMBLY: extractelement <4 x i32> %v, i32 3
+  // WEBASSEMBLY-NEXT: ret
+}
+
+long long f16(i64x2 v) {
+  return __builtin_wasm_extract_lane_i64x2(v, 1);
+  // WEBASSEMBLY: extractelement <2 x i64> %v, i32 1
+  // WEBASSEMBLY-NEXT: ret
+}
+
+float f17(f32x4 v) {
+  return __builtin_wasm_extract_lane_f32x4(v, 3);
+  // WEBASSEMBLY: extractelement <4 x float> %v, i32 3
+  // WEBASSEMBLY-NEXT: ret
+}
+
+double f18(f64x2 v) {
+  return __builtin_wasm_extract_lane_f64x2(v, 1);
+  // WEBASSEMBLY: extractelement <2 x double> %v, i32 1
+  // WEBASSEMBLY-NEXT: ret
+}