diff options
author | Nemanja Ivanovic <nemanja.i.ibm@gmail.com> | 2015-07-14 17:50:27 +0000 |
---|---|---|
committer | Nemanja Ivanovic <nemanja.i.ibm@gmail.com> | 2015-07-14 17:50:27 +0000 |
commit | 6c363ed67a58565623857297657e81db303b09da (patch) | |
tree | bde87a18d4ea59ecd16d786a5dfe0bd2e8f52010 /clang/test/CodeGen/builtins-ppc-p8vector.c | |
parent | 9f8ff9c4730d818b4f7e4d12e8e8ca33f3165255 (diff) | |
download | bcm5719-llvm-6c363ed67a58565623857297657e81db303b09da.tar.gz bcm5719-llvm-6c363ed67a58565623857297657e81db303b09da.zip |
Add missing builtins to altivec.h for ABI compliance (vol. 4)
This patch corresponds to review:
http://reviews.llvm.org/D11184
A number of new interfaces for altivec.h (as mandated by the ABI):
vector float vec_cpsgn(vector float, vector float)
vector double vec_cpsgn(vector double, vector double)
vector double vec_or(vector bool long long, vector double)
vector double vec_or(vector double, vector bool long long)
vector double vec_re(vector double)
vector signed char vec_cntlz(vector signed char)
vector unsigned char vec_cntlz(vector unsigned char)
vector short vec_cntlz(vector short)
vector unsigned short vec_cntlz(vector unsigned short)
vector int vec_cntlz(vector int)
vector unsigned int vec_cntlz(vector unsigned int)
vector signed long long vec_cntlz(vector signed long long)
vector unsigned long long vec_cntlz(vector unsigned long long)
vector signed char vec_nand(vector bool signed char, vector signed char)
vector signed char vec_nand(vector signed char, vector bool signed char)
vector signed char vec_nand(vector signed char, vector signed char)
vector unsigned char vec_nand(vector bool unsigned char, vector unsigned char)
vector unsigned char vec_nand(vector unsigned char, vector bool unsigned char)
vector unsigned char vec_nand(vector unsigned char, vector unsigned char)
vector short vec_nand(vector bool short, vector short)
vector short vec_nand(vector short, vector bool short)
vector short vec_nand(vector short, vector short)
vector unsigned short vec_nand(vector bool unsigned short, vector unsigned short)
vector unsigned short vec_nand(vector unsigned short, vector bool unsigned short)
vector unsigned short vec_nand(vector unsigned short, vector unsigned short)
vector int vec_nand(vector bool int, vector int)
vector int vec_nand(vector int, vector bool int)
vector int vec_nand(vector int, vector int)
vector unsigned int vec_nand(vector bool unsigned int, vector unsigned int)
vector unsigned int vec_nand(vector unsigned int, vector bool unsigned int)
vector unsigned int vec_nand(vector unsigned int, vector unsigned int)
vector signed long long vec_nand(vector bool long long, vector signed long long)
vector signed long long vec_nand(vector signed long long, vector bool long long)
vector signed long long vec_nand(vector signed long long, vector signed long long)
vector unsigned long long vec_nand(vector bool long long, vector unsigned long long)
vector unsigned long long vec_nand(vector unsigned long long, vector bool long long)
vector unsigned long long vec_nand(vector unsigned long long, vector unsigned long long)
vector signed char vec_orc(vector bool signed char, vector signed char)
vector signed char vec_orc(vector signed char, vector bool signed char)
vector signed char vec_orc(vector signed char, vector signed char)
vector unsigned char vec_orc(vector bool unsigned char, vector unsigned char)
vector unsigned char vec_orc(vector unsigned char, vector bool unsigned char)
vector unsigned char vec_orc(vector unsigned char, vector unsigned char)
vector short vec_orc(vector bool short, vector short)
vector short vec_orc(vector short, vector bool short)
vector short vec_orc(vector short, vector short)
vector unsigned short vec_orc(vector bool unsigned short, vector unsigned short)
vector unsigned short vec_orc(vector unsigned short, vector bool unsigned short)
vector unsigned short vec_orc(vector unsigned short, vector unsigned short)
vector int vec_orc(vector bool int, vector int)
vector int vec_orc(vector int, vector bool int)
vector int vec_orc(vector int, vector int)
vector unsigned int vec_orc(vector bool unsigned int, vector unsigned int)
vector unsigned int vec_orc(vector unsigned int, vector bool unsigned int)
vector unsigned int vec_orc(vector unsigned int, vector unsigned int)
vector signed long long vec_orc(vector bool long long, vector signed long long)
vector signed long long vec_orc(vector signed long long, vector bool long long)
vector signed long long vec_orc(vector signed long long, vector signed long long)
vector unsigned long long vec_orc(vector bool long long, vector unsigned long long)
vector unsigned long long vec_orc(vector unsigned long long, vector bool long long)
vector unsigned long long vec_orc(vector unsigned long long, vector unsigned long long)
vector signed char vec_div(vector signed char, vector signed char)
vector unsigned char vec_div(vector unsigned char, vector unsigned char)
vector signed short vec_div(vector signed short, vector signed short)
vector unsigned short vec_div(vector unsigned short, vector unsigned short)
vector signed int vec_div(vector signed int, vector signed int)
vector unsigned int vec_div(vector unsigned int, vector unsigned int)
vector signed long long vec_div(vector signed long long, vector signed long long)
vector unsigned long long vec_div(vector unsigned long long, vector unsigned long long)
vector unsigned char vec_mul(vector unsigned char, vector unsigned char)
vector unsigned int vec_mul(vector unsigned int, vector unsigned int)
vector unsigned long long vec_mul(vector unsigned long long, vector unsigned long long)
vector unsigned short vec_mul(vector unsigned short, vector unsigned short)
vector signed char vec_mul(vector signed char, vector signed char)
vector signed int vec_mul(vector signed int, vector signed int)
vector signed long long vec_mul(vector signed long long, vector signed long long)
vector signed short vec_mul(vector signed short, vector signed short)
vector signed long long vec_mergeh(vector signed long long, vector signed long long)
vector signed long long vec_mergeh(vector signed long long, vector bool long long)
vector signed long long vec_mergeh(vector bool long long, vector signed long long)
vector unsigned long long vec_mergeh(vector unsigned long long, vector unsigned long long)
vector unsigned long long vec_mergeh(vector unsigned long long, vector bool long long)
vector unsigned long long vec_mergeh(vector bool long long, vector unsigned long long)
vector double vec_mergeh(vector double, vector double)
vector double vec_mergeh(vector double, vector bool long long)
vector double vec_mergeh(vector bool long long, vector double)
vector signed long long vec_mergel(vector signed long long, vector signed long long)
vector signed long long vec_mergel(vector signed long long, vector bool long long)
vector signed long long vec_mergel(vector bool long long, vector signed long long)
vector unsigned long long vec_mergel(vector unsigned long long, vector unsigned long long)
vector unsigned long long vec_mergel(vector unsigned long long, vector bool long long)
vector unsigned long long vec_mergel(vector bool long long, vector unsigned long long)
vector double vec_mergel(vector double, vector double)
vector double vec_mergel(vector double, vector bool long long)
vector double vec_mergel(vector bool long long, vector double)
vector signed int vec_pack(vector signed long long, vector signed long long)
vector unsigned int vec_pack(vector unsigned long long, vector unsigned long long)
vector bool int vec_pack(vector bool long long, vector bool long long)
llvm-svn: 242171
Diffstat (limited to 'clang/test/CodeGen/builtins-ppc-p8vector.c')
-rw-r--r-- | clang/test/CodeGen/builtins-ppc-p8vector.c | 327 |
1 files changed, 326 insertions, 1 deletions
diff --git a/clang/test/CodeGen/builtins-ppc-p8vector.c b/clang/test/CodeGen/builtins-ppc-p8vector.c index 538d567f11c..208dd4347f6 100644 --- a/clang/test/CodeGen/builtins-ppc-p8vector.c +++ b/clang/test/CodeGen/builtins-ppc-p8vector.c @@ -35,7 +35,7 @@ vector signed short res_vss; vector unsigned short res_vus; vector bool short res_vbs; -vector int res_vsi; +vector signed int res_vsi; vector unsigned int res_vui; vector bool int res_vbi; @@ -442,6 +442,39 @@ void test1() { // CHECK-LE: bitcast <4 x i32> [[T3]] to <2 x double> // CHECK-PPC: error: assigning to + res_vsc = vec_cntlz(vsc); +// CHECK: call <16 x i8> @llvm.ctlz.v16i8(<16 x i8> %{{.+}}, i1 false) +// CHECK-LE: call <16 x i8> @llvm.ctlz.v16i8(<16 x i8> %{{.+}}, i1 false) +// CHECK-PPC: warning: implicit declaration of function 'vec_cntlz' is invalid in C99 + + res_vuc = vec_cntlz(vuc); +// CHECK: call <16 x i8> @llvm.ctlz.v16i8(<16 x i8> %{{.+}}, i1 false) +// CHECK-LE: call <16 x i8> @llvm.ctlz.v16i8(<16 x i8> %{{.+}}, i1 false) + + res_vss = vec_cntlz(vss); +// CHECK: call <8 x i16> @llvm.ctlz.v8i16(<8 x i16> %{{.+}}, i1 false) +// CHECK-LE: call <8 x i16> @llvm.ctlz.v8i16(<8 x i16> %{{.+}}, i1 false) + + res_vus = vec_cntlz(vus); +// CHECK: call <8 x i16> @llvm.ctlz.v8i16(<8 x i16> %{{.+}}, i1 false) +// CHECK-LE: call <8 x i16> @llvm.ctlz.v8i16(<8 x i16> %{{.+}}, i1 false) + + res_vsi = vec_cntlz(vsi); +// CHECK: call <4 x i32> @llvm.ctlz.v4i32(<4 x i32> %{{.+}}, i1 false) +// CHECK-LE: call <4 x i32> @llvm.ctlz.v4i32(<4 x i32> %{{.+}}, i1 false) + + res_vui = vec_cntlz(vui); +// CHECK: call <4 x i32> @llvm.ctlz.v4i32(<4 x i32> %{{.+}}, i1 false) +// CHECK-LE: call <4 x i32> @llvm.ctlz.v4i32(<4 x i32> %{{.+}}, i1 false) + + res_vsll = vec_cntlz(vsll); +// CHECK: call <2 x i64> @llvm.ctlz.v2i64(<2 x i64> %{{.+}}, i1 false) +// CHECK-LE: call <2 x i64> @llvm.ctlz.v2i64(<2 x i64> %{{.+}}, i1 false) + + res_vull = vec_cntlz(vull); +// CHECK: call <2 x i64> @llvm.ctlz.v2i64(<2 x i64> %{{.+}}, i1 false) +// CHECK-LE: call <2 x i64> @llvm.ctlz.v2i64(<2 x i64> %{{.+}}, i1 false) + /* ----------------------- predicates --------------------------- */ /* vec_all_eq */ res_i = vec_all_eq(vsll, vsll); @@ -1136,6 +1169,298 @@ void test1() { // CHECK: @llvm.ppc.altivec.vminud // CHECK-LE: @llvm.ppc.altivec.vminud + /* vec_nand */ + res_vsc = vec_nand(vsc, vsc); +// CHECK: [[T1:%.+]] = and <16 x i8> +// CHECK: xor <16 x i8> [[T1]], <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1> +// CHECK-LE: [[T1:%.+]] = and <16 x i8> +// CHECK-LE: xor <16 x i8> [[T1]], <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1> +// CHECK-PPC: warning: implicit declaration of function 'vec_nand' is invalid in C99 + + res_vsc = vec_nand(vsc, vbc); +// CHECK: [[T1:%.+]] = and <16 x i8> +// CHECK: xor <16 x i8> [[T1]], <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1> +// CHECK-LE: [[T1:%.+]] = and <16 x i8> +// CHECK-LE: xor <16 x i8> [[T1]], <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1> + + res_vsc = vec_nand(vbc, vsc); +// CHECK: [[T1:%.+]] = and <16 x i8> +// CHECK: xor <16 x i8> [[T1]], <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1> +// CHECK-LE: [[T1:%.+]] = and <16 x i8> +// CHECK-LE: xor <16 x i8> [[T1]], <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1> + + res_vuc = vec_nand(vuc, vuc); +// CHECK: [[T1:%.+]] = and <16 x i8> +// CHECK: xor <16 x i8> [[T1]], <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1> +// CHECK-LE: [[T1:%.+]] = and <16 x i8> +// CHECK-LE: xor <16 x i8> [[T1]], <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1> + + res_vuc = vec_nand(vuc, vbc); +// CHECK: [[T1:%.+]] = and <16 x i8> +// CHECK: xor <16 x i8> [[T1]], <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1> +// CHECK-LE: [[T1:%.+]] = and <16 x i8> +// CHECK-LE: xor <16 x i8> [[T1]], <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1> + + res_vuc = vec_nand(vbc, vuc); +// CHECK: [[T1:%.+]] = and <16 x i8> +// CHECK: xor <16 x i8> [[T1]], <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1> +// CHECK-LE: [[T1:%.+]] = and <16 x i8> +// CHECK-LE: xor <16 x i8> [[T1]], <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1> + + res_vss = vec_nand(vss, vss); +// CHECK: [[T1:%.+]] = and <8 x i16> +// CHECK: xor <8 x i16> [[T1]], <i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1> +// CHECK-LE: [[T1:%.+]] = and <8 x i16> +// CHECK-LE: xor <8 x i16> [[T1]], <i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1> + + res_vss = vec_nand(vss, vbs); +// CHECK: [[T1:%.+]] = and <8 x i16> +// CHECK: xor <8 x i16> [[T1]], <i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1> +// CHECK-LE: [[T1:%.+]] = and <8 x i16> +// CHECK-LE: xor <8 x i16> [[T1]], <i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1> + + res_vss = vec_nand(vbs, vss); +// CHECK: [[T1:%.+]] = and <8 x i16> +// CHECK: xor <8 x i16> [[T1]], <i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1> +// CHECK-LE: [[T1:%.+]] = and <8 x i16> +// CHECK-LE: xor <8 x i16> [[T1]], <i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1> + + res_vus = vec_nand(vus, vus); +// CHECK: [[T1:%.+]] = and <8 x i16> +// CHECK: xor <8 x i16> [[T1]], <i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1> +// CHECK-LE: [[T1:%.+]] = and <8 x i16> +// CHECK-LE: xor <8 x i16> [[T1]], <i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1> + + res_vus = vec_nand(vus, vbs); +// CHECK: [[T1:%.+]] = and <8 x i16> +// CHECK: xor <8 x i16> [[T1]], <i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1> +// CHECK-LE: [[T1:%.+]] = and <8 x i16> +// CHECK-LE: xor <8 x i16> [[T1]], <i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1> + + res_vus = vec_nand(vbs, vus); +// CHECK: [[T1:%.+]] = and <8 x i16> +// CHECK: xor <8 x i16> [[T1]], <i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1> +// CHECK-LE: [[T1:%.+]] = and <8 x i16> +// CHECK-LE: xor <8 x i16> [[T1]], <i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1> + + res_vsi = vec_nand(vsi, vsi); +// CHECK: [[T1:%.+]] = and <4 x i32> +// CHECK: xor <4 x i32> [[T1]], <i32 -1, i32 -1, i32 -1, i32 -1> +// CHECK-LE: [[T1:%.+]] = and <4 x i32> +// CHECK-LE: xor <4 x i32> [[T1]], <i32 -1, i32 -1, i32 -1, i32 -1> + + res_vsi = vec_nand(vsi, vbi); +// CHECK: [[T1:%.+]] = and <4 x i32> +// CHECK: xor <4 x i32> [[T1]], <i32 -1, i32 -1, i32 -1, i32 -1> +// CHECK-LE: [[T1:%.+]] = and <4 x i32> +// CHECK-LE: xor <4 x i32> [[T1]], <i32 -1, i32 -1, i32 -1, i32 -1> + + res_vsi = vec_nand(vbi, vsi); +// CHECK: [[T1:%.+]] = and <4 x i32> +// CHECK: xor <4 x i32> [[T1]], <i32 -1, i32 -1, i32 -1, i32 -1> +// CHECK-LE: [[T1:%.+]] = and <4 x i32> +// CHECK-LE: xor <4 x i32> [[T1]], <i32 -1, i32 -1, i32 -1, i32 -1> + + res_vui = vec_nand(vui, vui); +// CHECK: [[T1:%.+]] = and <4 x i32> +// CHECK: xor <4 x i32> [[T1]], <i32 -1, i32 -1, i32 -1, i32 -1> +// CHECK-LE: [[T1:%.+]] = and <4 x i32> +// CHECK-LE: xor <4 x i32> [[T1]], <i32 -1, i32 -1, i32 -1, i32 -1> + + res_vui = vec_nand(vui, vbi); +// CHECK: [[T1:%.+]] = and <4 x i32> +// CHECK: xor <4 x i32> [[T1]], <i32 -1, i32 -1, i32 -1, i32 -1> +// CHECK-LE: [[T1:%.+]] = and <4 x i32> +// CHECK-LE: xor <4 x i32> [[T1]], <i32 -1, i32 -1, i32 -1, i32 -1> + + res_vui = vec_nand(vbi, vui); +// CHECK: [[T1:%.+]] = and <4 x i32> +// CHECK: xor <4 x i32> [[T1]], <i32 -1, i32 -1, i32 -1, i32 -1> +// CHECK-LE: [[T1:%.+]] = and <4 x i32> +// CHECK-LE: xor <4 x i32> [[T1]], <i32 -1, i32 -1, i32 -1, i32 -1> + + res_vsll = vec_nand(vsll, vsll); +// CHECK: [[T1:%.+]] = and <2 x i64> +// CHECK: xor <2 x i64> [[T1]], <i64 -1, i64 -1> +// CHECK-LE: [[T1:%.+]] = and <2 x i64> +// CHECK-LE: xor <2 x i64> [[T1]], <i64 -1, i64 -1> + + res_vsll = vec_nand(vsll, vbll); +// CHECK: [[T1:%.+]] = and <2 x i64> +// CHECK: xor <2 x i64> [[T1]], <i64 -1, i64 -1> +// CHECK-LE: [[T1:%.+]] = and <2 x i64> +// CHECK-LE: xor <2 x i64> [[T1]], <i64 -1, i64 -1> + + res_vsll = vec_nand(vbll, vsll); +// CHECK: [[T1:%.+]] = and <2 x i64> +// CHECK: xor <2 x i64> [[T1]], <i64 -1, i64 -1> +// CHECK-LE: [[T1:%.+]] = and <2 x i64> +// CHECK-LE: xor <2 x i64> [[T1]], <i64 -1, i64 -1> + + res_vull = vec_nand(vull, vull); +// CHECK: [[T1:%.+]] = and <2 x i64> +// CHECK: xor <2 x i64> [[T1]], <i64 -1, i64 -1> +// CHECK-LE: [[T1:%.+]] = and <2 x i64> +// CHECK-LE: xor <2 x i64> [[T1]], <i64 -1, i64 -1> + + res_vull = vec_nand(vull, vbll); +// CHECK: [[T1:%.+]] = and <2 x i64> +// CHECK: xor <2 x i64> [[T1]], <i64 -1, i64 -1> +// CHECK-LE: [[T1:%.+]] = and <2 x i64> +// CHECK-LE: xor <2 x i64> [[T1]], <i64 -1, i64 -1> + + res_vull = vec_nand(vbll, vull); +// CHECK: [[T1:%.+]] = and <2 x i64> +// CHECK: xor <2 x i64> [[T1]], <i64 -1, i64 -1> +// CHECK-LE: [[T1:%.+]] = and <2 x i64> +// CHECK-LE: xor <2 x i64> [[T1]], <i64 -1, i64 -1> + + /* vec_orc */ + res_vsc = vec_orc(vsc, vsc); +// CHECK: [[T1:%.+]] = xor <16 x i8> {{%.+}}, <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1> +// CHECK: or <16 x i8> {{%.+}}, [[T1]] +// CHECK-LE: [[T1:%.+]] = xor <16 x i8> {{%.+}}, <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1> +// CHECK-LE: or <16 x i8> {{%.+}}, [[T1]] +// CHECK-PPC: warning: implicit declaration of function 'vec_orc' is invalid in C99 + + res_vsc = vec_orc(vsc, vbc); +// CHECK: [[T1:%.+]] = xor <16 x i8> {{%.+}}, <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1> +// CHECK: or <16 x i8> {{%.+}}, [[T1]] +// CHECK-LE: [[T1:%.+]] = xor <16 x i8> {{%.+}}, <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1> +// CHECK-LE: or <16 x i8> {{%.+}}, [[T1]] + + res_vsc = vec_orc(vbc, vsc); +// CHECK: [[T1:%.+]] = xor <16 x i8> {{%.+}}, <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1> +// CHECK: or <16 x i8> {{%.+}}, [[T1]] +// CHECK-LE: [[T1:%.+]] = xor <16 x i8> {{%.+}}, <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1> +// CHECK-LE: or <16 x i8> {{%.+}}, [[T1]] + + res_vuc = vec_orc(vuc, vuc); +// CHECK: [[T1:%.+]] = xor <16 x i8> {{%.+}}, <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1> +// CHECK: or <16 x i8> {{%.+}}, [[T1]] +// CHECK-LE: [[T1:%.+]] = xor <16 x i8> {{%.+}}, <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1> +// CHECK-LE: or <16 x i8> {{%.+}}, [[T1]] + + res_vuc = vec_orc(vuc, vbc); +// CHECK: [[T1:%.+]] = xor <16 x i8> {{%.+}}, <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1> +// CHECK: or <16 x i8> {{%.+}}, [[T1]] +// CHECK-LE: [[T1:%.+]] = xor <16 x i8> {{%.+}}, <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1> +// CHECK-LE: or <16 x i8> {{%.+}}, [[T1]] + + res_vuc = vec_orc(vbc, vuc); +// CHECK: [[T1:%.+]] = xor <16 x i8> {{%.+}}, <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1> +// CHECK: or <16 x i8> {{%.+}}, [[T1]] +// CHECK-LE: [[T1:%.+]] = xor <16 x i8> {{%.+}}, <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1> +// CHECK-LE: or <16 x i8> {{%.+}}, [[T1]] + + res_vss = vec_orc(vss, vss); +// CHECK: [[T1:%.+]] = xor <8 x i16> {{%.+}}, <i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1> +// CHECK: or <8 x i16> {{%.+}}, [[T1]] +// CHECK-LE: [[T1:%.+]] = xor <8 x i16> {{%.+}}, <i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1> +// CHECK-LE: or <8 x i16> {{%.+}}, [[T1]] + + res_vss = vec_orc(vss, vbs); +// CHECK: [[T1:%.+]] = xor <8 x i16> {{%.+}}, <i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1> +// CHECK: or <8 x i16> {{%.+}}, [[T1]] +// CHECK-LE: [[T1:%.+]] = xor <8 x i16> {{%.+}}, <i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1> +// CHECK-LE: or <8 x i16> {{%.+}}, [[T1]] + + res_vss = vec_orc(vbs, vss); +// CHECK: [[T1:%.+]] = xor <8 x i16> {{%.+}}, <i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1> +// CHECK: or <8 x i16> {{%.+}}, [[T1]] +// CHECK-LE: [[T1:%.+]] = xor <8 x i16> {{%.+}}, <i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1> +// CHECK-LE: or <8 x i16> {{%.+}}, [[T1]] + + res_vus = vec_orc(vus, vus); +// CHECK: [[T1:%.+]] = xor <8 x i16> {{%.+}}, <i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1> +// CHECK: or <8 x i16> {{%.+}}, [[T1]] +// CHECK-LE: [[T1:%.+]] = xor <8 x i16> {{%.+}}, <i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1> +// CHECK-LE: or <8 x i16> {{%.+}}, [[T1]] + + res_vus = vec_orc(vus, vbs); +// CHECK: [[T1:%.+]] = xor <8 x i16> {{%.+}}, <i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1> +// CHECK: or <8 x i16> {{%.+}}, [[T1]] +// CHECK-LE: [[T1:%.+]] = xor <8 x i16> {{%.+}}, <i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1> +// CHECK-LE: or <8 x i16> {{%.+}}, [[T1]] + + res_vus = vec_orc(vbs, vus); +// CHECK: [[T1:%.+]] = xor <8 x i16> {{%.+}}, <i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1> +// CHECK: or <8 x i16> {{%.+}}, [[T1]] +// CHECK-LE: [[T1:%.+]] = xor <8 x i16> {{%.+}}, <i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1> +// CHECK-LE: or <8 x i16> {{%.+}}, [[T1]] + + res_vsi = vec_orc(vsi, vsi); +// CHECK: [[T1:%.+]] = xor <4 x i32> {{%.+}}, <i32 -1, i32 -1, i32 -1, i32 -1> +// CHECK: or <4 x i32> {{%.+}}, [[T1]] +// CHECK-LE: [[T1:%.+]] = xor <4 x i32> {{%.+}}, <i32 -1, i32 -1, i32 -1, i32 -1> +// CHECK-LE: or <4 x i32> {{%.+}}, [[T1]] + + res_vsi = vec_orc(vsi, vbi); +// CHECK: [[T1:%.+]] = xor <4 x i32> {{%.+}}, <i32 -1, i32 -1, i32 -1, i32 -1> +// CHECK: or <4 x i32> {{%.+}}, [[T1]] +// CHECK-LE: [[T1:%.+]] = xor <4 x i32> {{%.+}}, <i32 -1, i32 -1, i32 -1, i32 -1> +// CHECK-LE: or <4 x i32> {{%.+}}, [[T1]] + + res_vsi = vec_orc(vbi, vsi); +// CHECK: [[T1:%.+]] = xor <4 x i32> {{%.+}}, <i32 -1, i32 -1, i32 -1, i32 -1> +// CHECK: or <4 x i32> {{%.+}}, [[T1]] +// CHECK-LE: [[T1:%.+]] = xor <4 x i32> {{%.+}}, <i32 -1, i32 -1, i32 -1, i32 -1> +// CHECK-LE: or <4 x i32> {{%.+}}, [[T1]] + + res_vui = vec_orc(vui, vui); +// CHECK: [[T1:%.+]] = xor <4 x i32> {{%.+}}, <i32 -1, i32 -1, i32 -1, i32 -1> +// CHECK: or <4 x i32> {{%.+}}, [[T1]] +// CHECK-LE: [[T1:%.+]] = xor <4 x i32> {{%.+}}, <i32 -1, i32 -1, i32 -1, i32 -1> +// CHECK-LE: or <4 x i32> {{%.+}}, [[T1]] + + res_vui = vec_orc(vui, vbi); +// CHECK: [[T1:%.+]] = xor <4 x i32> {{%.+}}, <i32 -1, i32 -1, i32 -1, i32 -1> +// CHECK: or <4 x i32> {{%.+}}, [[T1]] +// CHECK-LE: [[T1:%.+]] = xor <4 x i32> {{%.+}}, <i32 -1, i32 -1, i32 -1, i32 -1> +// CHECK-LE: or <4 x i32> {{%.+}}, [[T1]] + + res_vui = vec_orc(vbi, vui); +// CHECK: [[T1:%.+]] = xor <4 x i32> {{%.+}}, <i32 -1, i32 -1, i32 -1, i32 -1> +// CHECK: or <4 x i32> {{%.+}}, [[T1]] +// CHECK-LE: [[T1:%.+]] = xor <4 x i32> {{%.+}}, <i32 -1, i32 -1, i32 -1, i32 -1> +// CHECK-LE: or <4 x i32> {{%.+}}, [[T1]] + + res_vsll = vec_orc(vsll, vsll); +// CHECK: [[T1:%.+]] = xor <2 x i64> {{%.+}}, <i64 -1, i64 -1> +// CHECK: or <2 x i64> {{%.+}}, [[T1]] +// CHECK-LE: [[T1:%.+]] = xor <2 x i64> {{%.+}}, <i64 -1, i64 -1> +// CHECK-LE: or <2 x i64> {{%.+}}, [[T1]] + + res_vsll = vec_orc(vsll, vbll); +// CHECK: [[T1:%.+]] = xor <2 x i64> {{%.+}}, <i64 -1, i64 -1> +// CHECK: or <2 x i64> {{%.+}}, [[T1]] +// CHECK-LE: [[T1:%.+]] = xor <2 x i64> {{%.+}}, <i64 -1, i64 -1> +// CHECK-LE: or <2 x i64> {{%.+}}, [[T1]] + + res_vsll = vec_orc(vbll, vsll); +// CHECK: [[T1:%.+]] = xor <2 x i64> {{%.+}}, <i64 -1, i64 -1> +// CHECK: or <2 x i64> {{%.+}}, [[T1]] +// CHECK-LE: [[T1:%.+]] = xor <2 x i64> {{%.+}}, <i64 -1, i64 -1> +// CHECK-LE: or <2 x i64> {{%.+}}, [[T1]] + + res_vull = vec_orc(vull, vull); +// CHECK: [[T1:%.+]] = xor <2 x i64> {{%.+}}, <i64 -1, i64 -1> +// CHECK: or <2 x i64> {{%.+}}, [[T1]] +// CHECK-LE: [[T1:%.+]] = xor <2 x i64> {{%.+}}, <i64 -1, i64 -1> +// CHECK-LE: or <2 x i64> {{%.+}}, [[T1]] + + res_vull = vec_orc(vull, vbll); +// CHECK: [[T1:%.+]] = xor <2 x i64> {{%.+}}, <i64 -1, i64 -1> +// CHECK: or <2 x i64> {{%.+}}, [[T1]] +// CHECK-LE: [[T1:%.+]] = xor <2 x i64> {{%.+}}, <i64 -1, i64 -1> +// CHECK-LE: or <2 x i64> {{%.+}}, [[T1]] + + res_vull = vec_orc(vbll, vull); +// CHECK: [[T1:%.+]] = xor <2 x i64> {{%.+}}, <i64 -1, i64 -1> +// CHECK: or <2 x i64> {{%.+}}, [[T1]] +// CHECK-LE: [[T1:%.+]] = xor <2 x i64> {{%.+}}, <i64 -1, i64 -1> +// CHECK-LE: or <2 x i64> {{%.+}}, [[T1]] + /* vec_vbpermq */ res_vsll = vec_vbpermq(vsc, vsc); // CHECK: llvm.ppc.altivec.vbpermq |