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author | Craig Topper <craig.topper@intel.com> | 2019-03-24 00:56:52 +0000 |
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committer | Craig Topper <craig.topper@intel.com> | 2019-03-24 00:56:52 +0000 |
commit | 88f4054f48c56b816a555569ccd6e94c7072ab26 (patch) | |
tree | 78795d31146377fbeee755500f9d55dfa314bfce /clang/test/CodeGen/bitscan-builtins.c | |
parent | 4b7bf6a02c9700d6f455533ce76b1a0ffb99bd27 (diff) | |
download | bcm5719-llvm-88f4054f48c56b816a555569ccd6e94c7072ab26.tar.gz bcm5719-llvm-88f4054f48c56b816a555569ccd6e94c7072ab26.zip |
[X86] Add BSR/BSF/BSWAP intrinsics to ia32intrin.h to match gcc.
Summary:
These are all implemented by icc as well.
I made bit_scan_forward/reverse forward to the __bsfd/__bsrq since we also have
__bsfq/__bsrq.
Note, when lzcnt is enabled the bsr intrinsics generates lzcnt+xor instead of bsr.
Reviewers: RKSimon, spatel
Subscribers: cfe-commits, llvm-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D59682
llvm-svn: 356848
Diffstat (limited to 'clang/test/CodeGen/bitscan-builtins.c')
-rw-r--r-- | clang/test/CodeGen/bitscan-builtins.c | 33 |
1 files changed, 30 insertions, 3 deletions
diff --git a/clang/test/CodeGen/bitscan-builtins.c b/clang/test/CodeGen/bitscan-builtins.c index 25dfa404620..176d829127b 100644 --- a/clang/test/CodeGen/bitscan-builtins.c +++ b/clang/test/CodeGen/bitscan-builtins.c @@ -3,18 +3,45 @@ // PR33722 // RUN: %clang_cc1 -ffreestanding -triple x86_64-unknown-unknown -fms-extensions -fms-compatibility-version=19.00 -emit-llvm -o - %s | FileCheck %s -#include <immintrin.h> +#include <x86intrin.h> int test_bit_scan_forward(int a) { return _bit_scan_forward(a); // CHECK: @test_bit_scan_forward -// CHECK: %[[call:.*]] = call i32 @llvm.cttz.i32( +// CHECK: %[[call:.*]] = call i32 @llvm.cttz.i32(i32 %{{.*}}, i1 true) // CHECK: ret i32 %[[call]] } int test_bit_scan_reverse(int a) { return _bit_scan_reverse(a); -// CHECK: %[[call:.*]] = call i32 @llvm.ctlz.i32( +// CHECK: %[[call:.*]] = call i32 @llvm.ctlz.i32(i32 %{{.*}}, i1 true) // CHECK: %[[sub:.*]] = sub nsw i32 31, %[[call]] // CHECK: ret i32 %[[sub]] } + +int test__bsfd(int X) { +// CHECK: @test__bsfd +// CHECK: %[[call:.*]] = call i32 @llvm.cttz.i32(i32 %{{.*}}, i1 true) + return __bsfd(X); +} + +int test__bsfq(long long X) { +// CHECK: @test__bsfq +// CHECK: %[[call:.*]] = call i64 @llvm.cttz.i64(i64 %{{.*}}, i1 true) + return __bsfq(X); +} + +int test__bsrd(int X) { +// CHECK: @test__bsrd +// CHECK: %[[call:.*]] = call i32 @llvm.ctlz.i32(i32 %{{.*}}, i1 true) +// CHECK: %[[sub:.*]] = sub nsw i32 31, %[[call]] + return __bsrd(X); +} + +int test__bsrq(long long X) { +// CHECK: @test__bsrq +// CHECK: %[[call:.*]] = call i64 @llvm.ctlz.i64(i64 %{{.*}}, i1 true) +// CHECK: %[[cast:.*]] = trunc i64 %[[call]] to i32 +// CHECK: %[[sub:.*]] = sub nsw i32 63, %[[cast]] + return __bsrq(X); +} |