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| author | Craig Topper <craig.topper@intel.com> | 2018-06-08 03:24:47 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@intel.com> | 2018-06-08 03:24:47 +0000 |
| commit | 3428beeb2f7753d98572eb04ccda4fb59b0b0af4 (patch) | |
| tree | 37a2ba731c313982eeb55517709d815266f1f545 /clang/test/CodeGen/avx512vldq-builtins.c | |
| parent | 010edd37f82270a71129a6cea30d01722c0ead35 (diff) | |
| download | bcm5719-llvm-3428beeb2f7753d98572eb04ccda4fb59b0b0af4.tar.gz bcm5719-llvm-3428beeb2f7753d98572eb04ccda4fb59b0b0af4.zip | |
[X86] Add subvector insert and extract builtins to enable target feature checking and immediate range checking.
Test changes are due to differences in how we generate undef elements now. We also changed the types used for extractf128_si256/insertf128_si256 to match the signature of the builtin that previously existed which this patch resurrects. This also matches gcc.
llvm-svn: 334261
Diffstat (limited to 'clang/test/CodeGen/avx512vldq-builtins.c')
| -rw-r--r-- | clang/test/CodeGen/avx512vldq-builtins.c | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/clang/test/CodeGen/avx512vldq-builtins.c b/clang/test/CodeGen/avx512vldq-builtins.c index ea9db6ecc8a..31ae623fee3 100644 --- a/clang/test/CodeGen/avx512vldq-builtins.c +++ b/clang/test/CodeGen/avx512vldq-builtins.c @@ -1024,40 +1024,40 @@ __m256i test_mm256_maskz_broadcast_i64x2(__mmask8 __M, __m128i const* __A) { __m128d test_mm256_extractf64x2_pd(__m256d __A) { // CHECK-LABEL: @test_mm256_extractf64x2_pd - // CHECK: shufflevector <4 x double> %{{.*}}, <4 x double> zeroinitializer, <2 x i32> <i32 2, i32 3> + // CHECK: shufflevector <4 x double> %{{.*}}, <4 x double> undef, <2 x i32> <i32 2, i32 3> return _mm256_extractf64x2_pd(__A, 1); } __m128d test_mm256_mask_extractf64x2_pd(__m128d __W, __mmask8 __U, __m256d __A) { // CHECK-LABEL: @test_mm256_mask_extractf64x2_pd - // CHECK: shufflevector <4 x double> %{{.*}}, <4 x double> zeroinitializer, <2 x i32> <i32 2, i32 3> + // CHECK: shufflevector <4 x double> %{{.*}}, <4 x double> undef, <2 x i32> <i32 2, i32 3> // CHECK: select <2 x i1> %{{.*}}, <2 x double> %{{.*}}, <2 x double> %{{.*}} return _mm256_mask_extractf64x2_pd(__W, __U, __A, 1); } __m128d test_mm256_maskz_extractf64x2_pd(__mmask8 __U, __m256d __A) { // CHECK-LABEL: @test_mm256_maskz_extractf64x2_pd - // CHECK: shufflevector <4 x double> %{{.*}}, <4 x double> zeroinitializer, <2 x i32> <i32 2, i32 3> + // CHECK: shufflevector <4 x double> %{{.*}}, <4 x double> undef, <2 x i32> <i32 2, i32 3> // CHECK: select <2 x i1> %{{.*}}, <2 x double> %{{.*}}, <2 x double> %{{.*}} return _mm256_maskz_extractf64x2_pd(__U, __A, 1); } __m128i test_mm256_extracti64x2_epi64(__m256i __A) { // CHECK-LABEL: @test_mm256_extracti64x2_epi64 - // CHECK: shufflevector <4 x i64> %{{.*}}, <4 x i64> zeroinitializer, <2 x i32> <i32 2, i32 3> + // CHECK: shufflevector <4 x i64> %{{.*}}, <4 x i64> undef, <2 x i32> <i32 2, i32 3> return _mm256_extracti64x2_epi64(__A, 1); } __m128i test_mm256_mask_extracti64x2_epi64(__m128i __W, __mmask8 __U, __m256i __A) { // CHECK-LABEL: @test_mm256_mask_extracti64x2_epi64 - // CHECK: shufflevector <4 x i64> %{{.*}}, <4 x i64> zeroinitializer, <2 x i32> <i32 2, i32 3> + // CHECK: shufflevector <4 x i64> %{{.*}}, <4 x i64> undef, <2 x i32> <i32 2, i32 3> // CHECK: select <2 x i1> %{{.*}}, <2 x i64> %{{.*}}, <2 x i64> %{{.*}} return _mm256_mask_extracti64x2_epi64(__W, __U, __A, 1); } __m128i test_mm256_maskz_extracti64x2_epi64(__mmask8 __U, __m256i __A) { // CHECK-LABEL: @test_mm256_maskz_extracti64x2_epi64 - // CHECK: shufflevector <4 x i64> %{{.*}}, <4 x i64> zeroinitializer, <2 x i32> <i32 2, i32 3> + // CHECK: shufflevector <4 x i64> %{{.*}}, <4 x i64> undef, <2 x i32> <i32 2, i32 3> // CHECK: select <2 x i1> %{{.*}}, <2 x i64> %{{.*}}, <2 x i64> %{{.*}} return _mm256_maskz_extracti64x2_epi64(__U, __A, 1); } |
