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authorSanjay Patel <spatel@rotateright.com>2019-03-31 15:01:30 +0000
committerSanjay Patel <spatel@rotateright.com>2019-03-31 15:01:30 +0000
commitb276dd195a2dc3c908578493ce347988365aec69 (patch)
tree44d05b05c96320968c58757a27138fa0856b7009 /clang/test/CodeGen/avx-shuffle-builtins.c
parent9f4a4d39749ec48c9c14d2a7a7dcd025a2a7516a (diff)
downloadbcm5719-llvm-b276dd195a2dc3c908578493ce347988365aec69.tar.gz
bcm5719-llvm-b276dd195a2dc3c908578493ce347988365aec69.zip
[InstCombine] canonicalize select shuffles by commuting
In PR41304: https://bugs.llvm.org/show_bug.cgi?id=41304 ...we have a case where we want to fold a binop of select-shuffle (blended) values. Rather than try to match commuted variants of the pattern, we can canonicalize the shuffles and check for mask equality with commuted operands. We don't produce arbitrary shuffle masks in instcombine, but select-shuffles are a special case that the backend is required to handle because we already canonicalize vector select to this shuffle form. So there should be no codegen difference from this change. It's possible that this improves CSE in IR though. Differential Revision: https://reviews.llvm.org/D60016 llvm-svn: 357366
Diffstat (limited to 'clang/test/CodeGen/avx-shuffle-builtins.c')
-rw-r--r--clang/test/CodeGen/avx-shuffle-builtins.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/clang/test/CodeGen/avx-shuffle-builtins.c b/clang/test/CodeGen/avx-shuffle-builtins.c
index fef2879abd5..061cad76a5a 100644
--- a/clang/test/CodeGen/avx-shuffle-builtins.c
+++ b/clang/test/CodeGen/avx-shuffle-builtins.c
@@ -91,19 +91,19 @@ test_mm256_broadcast_ss(float const *__a) {
__m256 test_mm256_insertf128_ps_0(__m256 a, __m128 b) {
// CHECK-LABEL: @test_mm256_insertf128_ps_0
- // CHECK: shufflevector{{.*}}<i32 8, i32 9, i32 10, i32 11, i32 4, i32 5, i32 6, i32 7>
+ // CHECK: shufflevector{{.*}}<i32 0, i32 1, i32 2, i32 3, i32 12, i32 13, i32 14, i32 15>
return _mm256_insertf128_ps(a, b, 0);
}
__m256d test_mm256_insertf128_pd_0(__m256d a, __m128d b) {
// CHECK-LABEL: @test_mm256_insertf128_pd_0
- // CHECK: shufflevector{{.*}}<i32 4, i32 5, i32 2, i32 3>
+ // CHECK: shufflevector{{.*}}<i32 0, i32 1, i32 6, i32 7>
return _mm256_insertf128_pd(a, b, 0);
}
__m256i test_mm256_insertf128_si256_0(__m256i a, __m128i b) {
// CHECK-LABEL: @test_mm256_insertf128_si256_0
- // CHECK: shufflevector{{.*}}<i32 8, i32 9, i32 10, i32 11, i32 4, i32 5, i32 6, i32 7>
+ // CHECK: shufflevector{{.*}}<i32 0, i32 1, i32 2, i32 3, i32 12, i32 13, i32 14, i32 15>
return _mm256_insertf128_si256(a, b, 0);
}
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