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| author | Erich Keane <erich.keane@intel.com> | 2018-02-12 17:01:41 +0000 |
|---|---|---|
| committer | Erich Keane <erich.keane@intel.com> | 2018-02-12 17:01:41 +0000 |
| commit | 93e58667ee1030f36affff0cc5c43e404be19523 (patch) | |
| tree | ee537870827d464ee92e4f4e5a77f0f405068e4d /clang/test/CodeGen/attr-target-x86.c | |
| parent | 1022220b16123d918fa885b86fd3ca2b3b5683f1 (diff) | |
| download | bcm5719-llvm-93e58667ee1030f36affff0cc5c43e404be19523.tar.gz bcm5719-llvm-93e58667ee1030f36affff0cc5c43e404be19523.zip | |
Make attribute-target on a Definition-after-use update the LLVM attributes
As reported here: https://bugs.llvm.org/show_bug.cgi?id=36301
The issue is that the 'use' causes the plain declaration to emit
the attributes to LLVM-IR. However, if the definition added it
later, these would silently disappear.
This commit extracts that logic to its own function in CodeGenModule,
and has the attribute-applications done during 'definition' update
the attributes properly.
Differential Revision: https://reviews.llvm.org/D43095
llvm-svn: 324907
Diffstat (limited to 'clang/test/CodeGen/attr-target-x86.c')
| -rw-r--r-- | clang/test/CodeGen/attr-target-x86.c | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/clang/test/CodeGen/attr-target-x86.c b/clang/test/CodeGen/attr-target-x86.c index 9e46de74916..988b5e3f363 100644 --- a/clang/test/CodeGen/attr-target-x86.c +++ b/clang/test/CodeGen/attr-target-x86.c @@ -21,6 +21,17 @@ int __attribute__((target("no-mmx"))) qq(int a) { return 40; } int __attribute__((target("arch=lakemont,mmx"))) lake(int a) { return 4; } +int use_before_def(void); +int useage(void){ + return use_before_def(); +} + +// Adding the attribute to a definition does update it in IR. +int __attribute__((target("arch=lakemont,mmx"))) use_before_def(void) { + return 5; +} + + // Check that we emit the additional subtarget and cpu features for foo and not for baz or bar. // CHECK: baz{{.*}} #0 // CHECK: foo{{.*}} #1 @@ -36,6 +47,7 @@ int __attribute__((target("arch=lakemont,mmx"))) lake(int a) { return 4; } // CHECK: qax{{.*}} #5 // CHECK: qq{{.*}} #6 // CHECK: lake{{.*}} #7 +// CHECK: use_before_def{{.*}} #7 // CHECK: #0 = {{.*}}"target-cpu"="i686" "target-features"="+x87" // CHECK: #1 = {{.*}}"target-cpu"="ivybridge" "target-features"="+aes,+avx,+cx16,+f16c,+fsgsbase,+fxsr,+mmx,+pclmul,+popcnt,+rdrnd,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+ssse3,+x87,+xsave,+xsaveopt" // CHECK: #2 = {{.*}}"target-cpu"="i686" "target-features"="+x87,-aes,-avx,-avx2,-avx512bitalg,-avx512bw,-avx512cd,-avx512dq,-avx512er,-avx512f,-avx512ifma,-avx512pf,-avx512vbmi,-avx512vbmi2,-avx512vl,-avx512vnni,-avx512vpopcntdq,-f16c,-fma,-fma4,-gfni,-pclmul,-sha,-sse2,-sse3,-sse4.1,-sse4.2,-sse4a,-ssse3,-vaes,-vpclmulqdq,-xop,-xsave,-xsaveopt" |
