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| author | Chris Dewhurst <chris.dewhurst@lero.ie> | 2016-06-28 12:55:55 +0000 |
|---|---|---|
| committer | Chris Dewhurst <chris.dewhurst@lero.ie> | 2016-06-28 12:55:55 +0000 |
| commit | 7cc4cfe4fcedaaed7b45fb2f199a4097dd83e0b3 (patch) | |
| tree | 529afec196e6b2f3e4d12e1d9a5f3c989acb8b7c /clang/test/CodeGen/atomics-inlining.c | |
| parent | d95a17238982f82f158cd26b60a1530161483d20 (diff) | |
| download | bcm5719-llvm-7cc4cfe4fcedaaed7b45fb2f199a4097dd83e0b3.tar.gz bcm5719-llvm-7cc4cfe4fcedaaed7b45fb2f199a4097dd83e0b3.zip | |
[SPARC] Allows inlining of atomics for Sparc32 with appropriate store barrier.
The final change is required to extend the back-end's AtomicExpandPass that was implemented for Sparc (64 bit) and later extended for Sparc (32 bit).
llvm-svn: 274012
Diffstat (limited to 'clang/test/CodeGen/atomics-inlining.c')
| -rw-r--r-- | clang/test/CodeGen/atomics-inlining.c | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/clang/test/CodeGen/atomics-inlining.c b/clang/test/CodeGen/atomics-inlining.c index 23a79a2d28f..4974f22e3a4 100644 --- a/clang/test/CodeGen/atomics-inlining.c +++ b/clang/test/CodeGen/atomics-inlining.c @@ -3,6 +3,7 @@ // RUN: %clang_cc1 -triple powerpc64-linux-gnu -emit-llvm %s -o - | FileCheck %s -check-prefix=PPC64 // RUN: %clang_cc1 -triple mipsel-linux-gnu -emit-llvm %s -o - | FileCheck %s -check-prefix=MIPS32 // RUN: %clang_cc1 -triple mips64el-linux-gnu -emit-llvm %s -o - | FileCheck %s -check-prefix=MIPS64 +// RUN: %clang_cc1 -triple sparc-unknown-eabi -emit-llvm %s -o - | FileCheck %s -check-prefix=SPARC unsigned char c1, c2; unsigned short s1, s2; @@ -90,4 +91,16 @@ void test1(void) { // MIPS64: store atomic i64 {{.*}}, i64* @ll1 seq_cst // MIPS64: call void @__atomic_load(i64 zeroext 100, i8* getelementptr inbounds ([100 x i8], [100 x i8]* @a1, i32 0, i32 0) // MIPS64: call void @__atomic_store(i64 zeroext 100, i8* getelementptr inbounds ([100 x i8], [100 x i8]* @a1, i32 0, i32 0), i8* getelementptr inbounds ([100 x i8], [100 x i8]* @a2, i32 0, i32 0) + +// SPARC-LABEL: define void @test1 +// SPARC: = load atomic i8, i8* @c1 seq_cst +// SPARC: store atomic i8 {{.*}}, i8* @c1 seq_cst +// SPARC: = load atomic i16, i16* @s1 seq_cst +// SPARC: store atomic i16 {{.*}}, i16* @s1 seq_cst +// SPARC: = load atomic i32, i32* @i1 seq_cst +// SPARC: store atomic i32 {{.*}}, i32* @i1 seq_cst +// SPARC: = load atomic i64, i64* @ll1 seq_cst +// SPARC: store atomic i64 {{.*}}, i64* @ll1 seq_cst +// SPARC: call void @__atomic_load(i32 100, i8* getelementptr inbounds ([100 x i8], [100 x i8]* @a1, i32 0, i32 0), i8* getelementptr inbounds ([100 x i8], [100 x i8]* @a2, i32 0, i32 0) +// SPARC: call void @__atomic_store(i32 100, i8* getelementptr inbounds ([100 x i8], [100 x i8]* @a1, i32 0, i32 0), i8* getelementptr inbounds ([100 x i8], [100 x i8]* @a2, i32 0, i32 0) } |
