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| author | Bradley Smith <bradley.smith@arm.com> | 2015-04-29 14:32:06 +0000 |
|---|---|---|
| committer | Bradley Smith <bradley.smith@arm.com> | 2015-04-29 14:32:06 +0000 |
| commit | dfddebcfb9fa9d756518015fd31cddcc9eb1459e (patch) | |
| tree | 2f7a5b237c66598cc37ed87bcfaa18b2903e63cd /clang/lib | |
| parent | 1249e74648792bd34384aee95a2d1e8aa796b4e1 (diff) | |
| download | bcm5719-llvm-dfddebcfb9fa9d756518015fd31cddcc9eb1459e.tar.gz bcm5719-llvm-dfddebcfb9fa9d756518015fd31cddcc9eb1459e.zip | |
Revert code changes made under r235976.
This issue was fixed elsewhere in r235396 in a more general way, hence these
changes no longer do anything. Keep the testcase however, to ensure that we
don't regress this for ARM.
llvm-svn: 236104
Diffstat (limited to 'clang/lib')
| -rw-r--r-- | clang/lib/Basic/TargetInfo.cpp | 1 | ||||
| -rw-r--r-- | clang/lib/Basic/Targets.cpp | 6 | ||||
| -rw-r--r-- | clang/lib/CodeGen/CodeGenModule.cpp | 17 |
3 files changed, 0 insertions, 24 deletions
diff --git a/clang/lib/Basic/TargetInfo.cpp b/clang/lib/Basic/TargetInfo.cpp index cb6449f9741..330258b025b 100644 --- a/clang/lib/Basic/TargetInfo.cpp +++ b/clang/lib/Basic/TargetInfo.cpp @@ -75,7 +75,6 @@ TargetInfo::TargetInfo(const llvm::Triple &T) : TargetOpts(), Triple(T) { RegParmMax = 0; SSERegParmMax = 0; HasAlignMac68kSupport = false; - EnforceBitfieldContainerAlignment = false; // Default to no types using fpret. RealTypeUsesObjCFPRet = 0; diff --git a/clang/lib/Basic/Targets.cpp b/clang/lib/Basic/Targets.cpp index 3d6f4f95944..047cf0d5b5c 100644 --- a/clang/lib/Basic/Targets.cpp +++ b/clang/lib/Basic/Targets.cpp @@ -3983,9 +3983,6 @@ class ARMTargetInfo : public TargetInfo { ZeroLengthBitfieldBoundary = 0; - // Enforce the alignment of bitfield structs - EnforceBitfieldContainerAlignment = true; - // Thumb1 add sp, #imm requires the immediate value be multiple of 4, // so set preferred for small types to 32. if (T.isOSBinFormatMachO()) { @@ -4828,9 +4825,6 @@ public: UseBitFieldTypeAlignment = true; UseZeroLengthBitfieldAlignment = true; - // Enforce the alignment of bitfield structs - EnforceBitfieldContainerAlignment = true; - // AArch64 targets default to using the ARM C++ ABI. TheCXXABI.set(TargetCXXABI::GenericAArch64); } diff --git a/clang/lib/CodeGen/CodeGenModule.cpp b/clang/lib/CodeGen/CodeGenModule.cpp index 861a6ee164e..c517d17666d 100644 --- a/clang/lib/CodeGen/CodeGenModule.cpp +++ b/clang/lib/CodeGen/CodeGenModule.cpp @@ -1799,23 +1799,6 @@ CodeGenModule::GetOrCreateLLVMGlobal(StringRef MangledName, D->getType().isConstant(Context) && isExternallyVisible(D->getLinkageAndVisibility().getLinkage())) GV->setSection(".cp.rodata"); - - // The ARM/AArch64 ABI expects structs with bitfields to respect the proper - // container alignment, hence we have to enfore this in the IR so as to - // work around clang combining bitfields into one large type. - if (getContext().getTargetInfo().enforceBitfieldContainerAlignment()) { - if (const auto *RT = D->getType()->getAs<RecordType>()) { - const RecordDecl *RD = RT->getDecl(); - - for (auto I = RD->field_begin(), End = RD->field_end(); I != End; ++I) { - if ((*I)->isBitField()) { - const ASTRecordLayout &Info = getContext().getASTRecordLayout(RD); - GV->setAlignment(Info.getAlignment().getQuantity()); - break; - } - } - } - } } if (AddrSpace != Ty->getAddressSpace()) |

