diff options
| author | Oliver Stannard <oliver.stannard@arm.com> | 2019-03-29 13:32:41 +0000 |
|---|---|---|
| committer | Oliver Stannard <oliver.stannard@arm.com> | 2019-03-29 13:32:41 +0000 |
| commit | d83a559318a5302ef81a916bc3b7502c1b228667 (patch) | |
| tree | 0b755441705e6ad874fa3ec31630f6e172eff882 /clang/lib | |
| parent | 7f33574be3416b71ef4fc3384cbf33b2a9bd0a81 (diff) | |
| download | bcm5719-llvm-d83a559318a5302ef81a916bc3b7502c1b228667.tar.gz bcm5719-llvm-d83a559318a5302ef81a916bc3b7502c1b228667.zip | |
[AArch64] Support selecting TPIDR_EL[1-3] as the thread base
Add an -mtp=el[0-3] option to select which of the AArch64 thread ID registers
will be used for the TLS base pointer.
This is a followup to rL356657 which added subtarget features to enable
accesses to the privileged thread ID registers.
Patch by Philip Derrin!
Differential revision: https://reviews.llvm.org/D59631
llvm-svn: 357250
Diffstat (limited to 'clang/lib')
| -rw-r--r-- | clang/lib/Driver/ToolChains/Arch/AArch64.cpp | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/clang/lib/Driver/ToolChains/Arch/AArch64.cpp b/clang/lib/Driver/ToolChains/Arch/AArch64.cpp index e229e4c13cf..35d11f4e2d3 100644 --- a/clang/lib/Driver/ToolChains/Arch/AArch64.cpp +++ b/clang/lib/Driver/ToolChains/Arch/AArch64.cpp @@ -194,6 +194,18 @@ void aarch64::getAArch64TargetFeatures(const Driver &D, Features.push_back("-neon"); } + if (Arg *A = Args.getLastArg(options::OPT_mtp_mode_EQ)) { + StringRef Mtp = A->getValue(); + if (Mtp == "el3") + Features.push_back("+tpidr-el3"); + else if (Mtp == "el2") + Features.push_back("+tpidr-el2"); + else if (Mtp == "el1") + Features.push_back("+tpidr-el1"); + else if (Mtp != "el0") + D.Diag(diag::err_drv_invalid_mtp) << A->getAsString(Args); + } + // En/disable crc if (Arg *A = Args.getLastArg(options::OPT_mcrc, options::OPT_mnocrc)) { if (A->getOption().matches(options::OPT_mcrc)) |

