diff options
author | Michael Zuckerman <Michael.zuckerman@intel.com> | 2016-03-01 17:49:03 +0000 |
---|---|---|
committer | Michael Zuckerman <Michael.zuckerman@intel.com> | 2016-03-01 17:49:03 +0000 |
commit | d176d744af43a055b4b2cf3e9999bce54abbb9ae (patch) | |
tree | fb1c58380b9ce6cb344af5a59213c1fb6abb0269 /clang/lib | |
parent | f84df30e4fbba7b9101f8f0f6a951d8ed6bafb85 (diff) | |
download | bcm5719-llvm-d176d744af43a055b4b2cf3e9999bce54abbb9ae.tar.gz bcm5719-llvm-d176d744af43a055b4b2cf3e9999bce54abbb9ae.zip |
[CLANG][AVX512][BUILTIN] Adding PSRL{DI|QI}{128|256|512} builtin
Differential Revision: http://reviews.llvm.org/D17714
llvm-svn: 262355
Diffstat (limited to 'clang/lib')
-rw-r--r-- | clang/lib/Headers/avx512fintrin.h | 41 | ||||
-rw-r--r-- | clang/lib/Headers/avx512vlintrin.h | 134 |
2 files changed, 175 insertions, 0 deletions
diff --git a/clang/lib/Headers/avx512fintrin.h b/clang/lib/Headers/avx512fintrin.h index 4b8636ac9ba..2452c479f0c 100644 --- a/clang/lib/Headers/avx512fintrin.h +++ b/clang/lib/Headers/avx512fintrin.h @@ -3561,6 +3561,47 @@ __builtin_ia32_psllqi512_mask ((__v8di)( __A),( __B),\ }) + +#define _mm512_srli_epi32( __A, __B) __extension__ ({ \ +__builtin_ia32_psrldi512_mask ((__v16si)( __A),( __B),\ + (__v16si)\ + _mm512_setzero_si512 (),\ + (__mmask16) -1);\ +}) + +#define _mm512_mask_srli_epi32( __W, __U, __A, __B) __extension__ ({ \ +__builtin_ia32_psrldi512_mask ((__v16si)( __A),( __B),\ + (__v16si)( __W),\ + (__mmask16)( __U));\ +}) + +#define _mm512_maskz_srli_epi32( __U, __A, __B) __extension__ ({ \ +__builtin_ia32_psrldi512_mask ((__v16si)( __A),( __B),\ + (__v16si)\ + _mm512_setzero_si512 (),\ + (__mmask16)( __U));\ +}) + +#define _mm512_srli_epi64( __A, __B) __extension__ ({ \ +__builtin_ia32_psrlqi512_mask ((__v8di)( __A),( __B),\ + (__v8di)\ + _mm512_setzero_si512 (),\ + (__mmask8) -1);\ +}) + +#define _mm512_mask_srli_epi64( __W, __U, __A, __B) __extension__ ({ \ +__builtin_ia32_psrlqi512_mask ((__v8di)( __A),( __B),\ + (__v8di)( __W),\ + (__mmask8)( __U));\ +}) + +#define _mm512_maskz_srli_epi64( __U, __A, __B) __extension__ ({ \ +__builtin_ia32_psrlqi512_mask ((__v8di)( __A),( __B),\ + (__v8di)\ + _mm512_setzero_si512 (),\ + (__mmask8)( __U));\ +}) + #undef __DEFAULT_FN_ATTRS #endif // __AVX512FINTRIN_H diff --git a/clang/lib/Headers/avx512vlintrin.h b/clang/lib/Headers/avx512vlintrin.h index 731d7fe2619..3f45770a322 100644 --- a/clang/lib/Headers/avx512vlintrin.h +++ b/clang/lib/Headers/avx512vlintrin.h @@ -5638,6 +5638,140 @@ _mm256_maskz_srlv_epi32 (__mmask8 __U, __m256i __X, __m256i __Y) (__mmask8) __U); } + + +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_mask_srl_epi32 (__m128i __W, __mmask8 __U, __m128i __A, + __m128i __B) +{ + return (__m128i) __builtin_ia32_psrld128_mask ((__v4si) __A, + (__v4si) __B, + (__v4si) __W, + (__mmask8) __U); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_maskz_srl_epi32 (__mmask8 __U, __m128i __A, __m128i __B) +{ + return (__m128i) __builtin_ia32_psrld128_mask ((__v4si) __A, + (__v4si) __B, + (__v4si) + _mm_setzero_si128 (), + (__mmask8) __U); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS +_mm256_mask_srl_epi32 (__m256i __W, __mmask8 __U, __m256i __A, + __m128i __B) +{ + return (__m256i) __builtin_ia32_psrld256_mask ((__v8si) __A, + (__v4si) __B, + (__v8si) __W, + (__mmask8) __U); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS +_mm256_maskz_srl_epi32 (__mmask8 __U, __m256i __A, __m128i __B) +{ + return (__m256i) __builtin_ia32_psrld256_mask ((__v8si) __A, + (__v4si) __B, + (__v8si) + _mm256_setzero_si256 (), + (__mmask8) __U); +} + +#define _mm_mask_srli_epi32( __W, __U, __A, __imm) __extension__ ({ \ +__builtin_ia32_psrldi128_mask ((__v4si)( __A),( __imm),\ + (__v4si)( __W),\ + (__mmask8)( __U));\ +}) + +#define _mm_maskz_srli_epi32( __U, __A, __imm) __extension__ ({ \ +__builtin_ia32_psrldi128_mask ((__v4si)( __A),( __imm),\ + (__v4si)\ + _mm_setzero_si128 (),\ + (__mmask8)( __U));\ +}) + +#define _mm256_mask_srli_epi32( __W, __U, __A, __imm) __extension__ ({ \ +__builtin_ia32_psrldi256_mask ((__v8si)( __A),( __imm),\ + (__v8si)( __W),\ + (__mmask8)( __U));\ +}) + +#define _mm256_maskz_srli_epi32( __U, __A, __imm) __extension__ ({ \ +__builtin_ia32_psrldi256_mask ((__v8si)( __A),( __imm),\ + (__v8si)\ + _mm256_setzero_si256 (),\ + (__mmask8)( __U));\ +}) + +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_mask_srl_epi64 (__m128i __W, __mmask8 __U, __m128i __A, + __m128i __B) +{ + return (__m128i) __builtin_ia32_psrlq128_mask ((__v2di) __A, + (__v2di) __B, + (__v2di) __W, + (__mmask8) __U); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_maskz_srl_epi64 (__mmask8 __U, __m128i __A, __m128i __B) +{ + return (__m128i) __builtin_ia32_psrlq128_mask ((__v2di) __A, + (__v2di) __B, + (__v2di) + _mm_setzero_di (), + (__mmask8) __U); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS +_mm256_mask_srl_epi64 (__m256i __W, __mmask8 __U, __m256i __A, + __m128i __B) +{ + return (__m256i) __builtin_ia32_psrlq256_mask ((__v4di) __A, + (__v2di) __B, + (__v4di) __W, + (__mmask8) __U); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS +_mm256_maskz_srl_epi64 (__mmask8 __U, __m256i __A, __m128i __B) +{ + return (__m256i) __builtin_ia32_psrlq256_mask ((__v4di) __A, + (__v2di) __B, + (__v4di) + _mm256_setzero_si256 (), + (__mmask8) __U); +} + +#define _mm_mask_srli_epi64( __W, __U, __A, __imm) __extension__ ({ \ +__builtin_ia32_psrlqi128_mask ((__v2di)( __A),( __imm),\ + (__v2di)( __W),\ + (__mmask8)( __U));\ +}) + +#define _mm_maskz_srli_epi64( __U, __A, __imm) __extension__ ({ \ +__builtin_ia32_psrlqi128_mask ((__v2di)( __A),( __imm),\ + (__v2di)\ + _mm_setzero_si128 (),\ + (__mmask8)( __U));\ +}) + +#define _mm256_mask_srli_epi64( __W, __U, __A, __imm) __extension__ ({ \ +__builtin_ia32_psrlqi256_mask ((__v4di)( __A),( __imm),\ + (__v4di)( __W),\ + (__mmask8)( __U));\ +}) + +#define _mm256_maskz_srli_epi64( __U, __A, __imm) __extension__ ({ \ +__builtin_ia32_psrlqi256_mask ((__v4di)( __A),( __imm),\ + (__v4di)\ + _mm256_setzero_si256 (),\ + (__mmask8)( __U));\ +}) + #undef __DEFAULT_FN_ATTRS #undef __DEFAULT_FN_ATTRS_BOTH |