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| author | Nate Begeman <natebegeman@mac.com> | 2010-06-04 21:36:27 +0000 |
|---|---|---|
| committer | Nate Begeman <natebegeman@mac.com> | 2010-06-04 21:36:27 +0000 |
| commit | 6736cc89d0c58cd4690e806b5285c7e674ee79c2 (patch) | |
| tree | 354f69d03053e38c80454d2cdaf6ace2681d200b /clang/lib | |
| parent | 0d081df3f28f1e07267ccec4e7f395aa419ae12b (diff) | |
| download | bcm5719-llvm-6736cc89d0c58cd4690e806b5285c7e674ee79c2.tar.gz bcm5719-llvm-6736cc89d0c58cd4690e806b5285c7e674ee79c2.zip | |
Initial support for ARM NEON builtins, codegen up next
llvm-svn: 105489
Diffstat (limited to 'clang/lib')
| -rw-r--r-- | clang/lib/Headers/arm_neon.td | 9 |
1 files changed, 4 insertions, 5 deletions
diff --git a/clang/lib/Headers/arm_neon.td b/clang/lib/Headers/arm_neon.td index f412dac04a4..3d760d647d0 100644 --- a/clang/lib/Headers/arm_neon.td +++ b/clang/lib/Headers/arm_neon.td @@ -210,12 +210,11 @@ def VST4_LANE : WInst<"vp4i", "QUsQUiQsQiQhQfQPsUcUsUicsihfPcPs">; //////////////////////////////////////////////////////////////////////////////// // E.3.16 Extract lanes from a vector -// FIXME: need to test sign/zero-extractness -def VGET_LANE : WInst<"sdi", "UcUsUicsiPcPsfQUcQUsQUiQcQsQiQPcQPsQflUlQlQUl">; +def VGET_LANE : IInst<"sdi", "UcUsUicsiPcPsfQUcQUsQUiQcQsQiQPcQPsQflUlQlQUl">; //////////////////////////////////////////////////////////////////////////////// // E.3.17 Set lanes within a vector -def VSET_LANE : WInst<"dsdi", "UcUsUicsiPcPsfQUcQUsQUiQcQsQiQPcQPsQflUlQlQUl">; +def VSET_LANE : IInst<"dsdi", "UcUsUicsiPcPsfQUcQUsQUiQcQsQiQPcQPsQflUlQlQUl">; //////////////////////////////////////////////////////////////////////////////// // E.3.18 Initialize a vector from bit pattern @@ -223,8 +222,8 @@ def VCREATE: Inst<"dl", "csihfUcUsUiUlPcPsl", OP_CAST>; //////////////////////////////////////////////////////////////////////////////// // E.3.19 Set all lanes to same value -def VDUP_N : WInst<"ds", "UcUsUicsiPcPsfQUcQUsQUiQcQsQiQPcQPsQflUlQlQUl">; -def VMOV_N : WInst<"ds", "UcUsUicsiPcPsfQUcQUsQUiQcQsQiQPcQPsQflUlQlQUl">; +def VDUP_N : IInst<"ds", "UcUsUicsiPcPsfQUcQUsQUiQcQsQiQPcQPsQflUlQlQUl">; +def VMOV_N : IInst<"ds", "UcUsUicsiPcPsfQUcQUsQUiQcQsQiQPcQPsQflUlQlQUl">; //////////////////////////////////////////////////////////////////////////////// // E.3.20 Combining vectors |
