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| author | Oleg Ranevskyy <oranevskyy@accesssoftek.com> | 2016-11-18 21:00:08 +0000 |
|---|---|---|
| committer | Oleg Ranevskyy <oranevskyy@accesssoftek.com> | 2016-11-18 21:00:08 +0000 |
| commit | 85d93a877846380567e8e28786f4591d1b61d34f (patch) | |
| tree | ab3804313a6858c9e19316134131864cbd75bbd4 /clang/lib/StaticAnalyzer/Core/ProgramState.cpp | |
| parent | 7594ec3355cf4410663868a119a5ffb05649e095 (diff) | |
| download | bcm5719-llvm-85d93a877846380567e8e28786f4591d1b61d34f.tar.gz bcm5719-llvm-85d93a877846380567e8e28786f4591d1b61d34f.zip | |
[ARM] Fix sema check of ARM special register names
Summary:
This is a simple sema check patch for arguments of `__builtin_arm_rsr` and the related builtins, which currently do not allow special registers with indexes >7.
Some of the possible register name formats these builtins accept are:
```
{c}p<coprocessor>:<op1>:c<CRn>:c<CRm>:<op2>
```
```
o0:op1:CRn:CRm:op2
```
where `op1` / `op2` are integers in the range [0, 7] and `CRn` / `CRm` are integers in the range [0, 15].
The current sema check does not allow `CRn` > 7 and accepts `op2` up to 15.
Reviewers: LukeCheeseman, rengolin
Subscribers: asl, aemerson, rengolin, cfe-commits
Differential Revision: https://reviews.llvm.org/D26464
llvm-svn: 287378
Diffstat (limited to 'clang/lib/StaticAnalyzer/Core/ProgramState.cpp')
0 files changed, 0 insertions, 0 deletions
