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| author | Craig Topper <craig.topper@intel.com> | 2017-08-21 16:04:11 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@intel.com> | 2017-08-21 16:04:11 +0000 |
| commit | cc255bcd7720c77a931e239f13f72bae37a90e8d (patch) | |
| tree | ee9de25d93f3d5579b0996b356fce7caf47e819b /clang/lib/StaticAnalyzer/Core/ExprEngine.cpp | |
| parent | 8078dd2984cd4ba5a634038bd7b2326795fe6b23 (diff) | |
| download | bcm5719-llvm-cc255bcd7720c77a931e239f13f72bae37a90e8d.tar.gz bcm5719-llvm-cc255bcd7720c77a931e239f13f72bae37a90e8d.zip | |
[InstCombine] Fix a weakness in canEvaluateZExtd around 'and' instructions
Summary:
If the bitsToClear from the LHS of an 'and' comes back non-zero, but all of those bits are known zero on the RHS, we can reset bitsToClear.
Without this, the 'or' in the modified test case blocks the transform because it has non-zero bits in its RHS in those bits.
Reviewers: spatel, majnemer, davide
Reviewed By: davide
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D36944
llvm-svn: 311343
Diffstat (limited to 'clang/lib/StaticAnalyzer/Core/ExprEngine.cpp')
0 files changed, 0 insertions, 0 deletions
