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| author | Yaxun Liu <Yaxun.Liu@amd.com> | 2017-09-28 19:07:59 +0000 |
|---|---|---|
| committer | Yaxun Liu <Yaxun.Liu@amd.com> | 2017-09-28 19:07:59 +0000 |
| commit | 304f349770843defedf882545cdfa078cf94c20c (patch) | |
| tree | 1e1a679b92d6695eb4c36599f3208b42bdb6d31c /clang/lib/Serialization/MultiOnDiskHashTable.h | |
| parent | d6218cc385920a462a99d28e0959c7300b25468a (diff) | |
| download | bcm5719-llvm-304f349770843defedf882545cdfa078cf94c20c.tar.gz bcm5719-llvm-304f349770843defedf882545cdfa078cf94c20c.zip | |
[AMDGPU] Allow flexible register names in inline asm constraints
Currently AMDGPU inline asm only allow v and s as register names in constraints.
This patch allows the following register names in constraints: (n, m is unsigned integer, n < m)
v
s
{vn} or {v[n]}
{sn} or {s[n]}
{S} , where S is a special register name
{v[n:m]}
{s[n:m]}
Differential Revision: https://reviews.llvm.org/D37568
llvm-svn: 314452
Diffstat (limited to 'clang/lib/Serialization/MultiOnDiskHashTable.h')
0 files changed, 0 insertions, 0 deletions
