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| author | Jonas Paulsson <paulsson@linux.vnet.ibm.com> | 2019-12-17 10:17:59 -0800 |
|---|---|---|
| committer | Jonas Paulsson <paulsson@linux.vnet.ibm.com> | 2019-12-20 10:44:58 -0800 |
| commit | 9fcebad5e5c1530d6d63a2b3d137dd1473b3b615 (patch) | |
| tree | 757a609e880f1652fc88d869073f4a6438eb5544 /clang/lib/Serialization/ModuleFileExtension.cpp | |
| parent | a805e0fb18ca3b85712a587b72e5048e78d8f1da (diff) | |
| download | bcm5719-llvm-9fcebad5e5c1530d6d63a2b3d137dd1473b3b615.tar.gz bcm5719-llvm-9fcebad5e5c1530d6d63a2b3d137dd1473b3b615.zip | |
[SystemZ] Add a mapping from "select register" to "load on condition" (2-addr).
The SELR(Mux) instructions can be converted to two-address form as LOCR(Mux)
instructions whenever one of the sources are the same reg as dest. By adding
this mapping in getTwoOperandOpcode(), we get:
- Two-address hints in getRegAllocationHints() for select register
instructions.
- No need anymore for special handling in SystemZShortenInst.cpp -
shortenSelect() removed.
The two-address hints are now added before the GRX32 hints, which should be
preferred.
Review: Ulrich Weigand
https://reviews.llvm.org/D68870
Diffstat (limited to 'clang/lib/Serialization/ModuleFileExtension.cpp')
0 files changed, 0 insertions, 0 deletions
