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| author | Craig Topper <craig.topper@intel.com> | 2018-06-07 21:27:41 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@intel.com> | 2018-06-07 21:27:41 +0000 |
| commit | e56819eb691f2e8959d77858ecb7877e1686bfcd (patch) | |
| tree | 0038208444b25b04a083e4a6625a5bebd162e976 /clang/lib/Sema | |
| parent | 188a619e56ac0115cb10bd9a4b7427f3e6ff2c6f (diff) | |
| download | bcm5719-llvm-e56819eb691f2e8959d77858ecb7877e1686bfcd.tar.gz bcm5719-llvm-e56819eb691f2e8959d77858ecb7877e1686bfcd.zip | |
[X86] Add builtins for VALIGNQ/VALIGND to enable proper target feature checking.
We still emit shufflevector instructions we just do it from CGBuiltin.cpp now. This ensures the intrinsics that use this are only available on CPUs that support the feature.
I also added range checking to the immediate, but only checked it is 8 bits or smaller. We should maybe be stricter since we never use all 8 bits, but gcc doesn't seem to do that.
llvm-svn: 334237
Diffstat (limited to 'clang/lib/Sema')
| -rw-r--r-- | clang/lib/Sema/SemaChecking.cpp | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/clang/lib/Sema/SemaChecking.cpp b/clang/lib/Sema/SemaChecking.cpp index 0c5be0506e0..419ac47b9b8 100644 --- a/clang/lib/Sema/SemaChecking.cpp +++ b/clang/lib/Sema/SemaChecking.cpp @@ -2712,6 +2712,12 @@ bool Sema::CheckX86BuiltinFunctionCall(unsigned BuiltinID, CallExpr *TheCall) { case X86::BI__builtin_ia32_palignr128: case X86::BI__builtin_ia32_palignr256: case X86::BI__builtin_ia32_palignr512: + case X86::BI__builtin_ia32_alignq512: + case X86::BI__builtin_ia32_alignd512: + case X86::BI__builtin_ia32_alignd128: + case X86::BI__builtin_ia32_alignd256: + case X86::BI__builtin_ia32_alignq128: + case X86::BI__builtin_ia32_alignq256: case X86::BI__builtin_ia32_vcomisd: case X86::BI__builtin_ia32_vcomiss: case X86::BI__builtin_ia32_dbpsadbw128_mask: |
