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| author | Hal Finkel <hfinkel@anl.gov> | 2014-01-02 21:13:43 +0000 |
|---|---|---|
| committer | Hal Finkel <hfinkel@anl.gov> | 2014-01-02 21:13:43 +0000 |
| commit | decb024c86638ade1db1dafabad5e216a75a23b7 (patch) | |
| tree | 86d9dd26df9666ddd1171e6dd7870b7f960aa74c /clang/lib/Sema/SemaDeclAttr.cpp | |
| parent | b6bc783060fc9653d6284771d65eeb97c8fa5e05 (diff) | |
| download | bcm5719-llvm-decb024c86638ade1db1dafabad5e216a75a23b7.tar.gz bcm5719-llvm-decb024c86638ade1db1dafabad5e216a75a23b7.zip | |
Disable compare sinking in CodeGenPrepare when multiple condition registers are available
As noted in the comment above CodeGenPrepare::OptimizeInst, which aggressively
sinks compares to reduce pressure on the condition register(s), for targets
such as PowerPC with multiple condition registers, this may not be the right
thing to do. This adds an HasMultipleConditionRegisters boolean to TLI, and
CodeGenPrepare::OptimizeInst is skipped when HasMultipleConditionRegisters is
true.
This functionality will be used by the PowerPC backend in an upcoming commit.
Especially when the PowerPC backend starts tracking individual condition
register bits as separate allocatable entities (which will happen in this
upcoming commit), this sinking from CodeGenPrepare::OptimizeInst is
significantly suboptimial.
llvm-svn: 198354
Diffstat (limited to 'clang/lib/Sema/SemaDeclAttr.cpp')
0 files changed, 0 insertions, 0 deletions
