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author | Yaxun Liu <Yaxun.Liu@amd.com> | 2018-06-12 23:58:59 +0000 |
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committer | Yaxun Liu <Yaxun.Liu@amd.com> | 2018-06-12 23:58:59 +0000 |
commit | aa24601f9890c5cbc9b33caf8a1d058776ece0af (patch) | |
tree | ce4fc30864508d99c2340e1c537e1f8d931503db /clang/lib/Sema/SemaDeclAttr.cpp | |
parent | e6fdb6a28c5dbaabfd15e9b991eeb1b160870cf2 (diff) | |
download | bcm5719-llvm-aa24601f9890c5cbc9b33caf8a1d058776ece0af.tar.gz bcm5719-llvm-aa24601f9890c5cbc9b33caf8a1d058776ece0af.zip |
[CUDA][HIP] Allow CUDA __global__ functions to have amdgpu kernel attributes
There are HIP applications e.g. Tensorflow 1.3 using amdgpu kernel attributes, however
currently they are only allowed on OpenCL kernel functions.
This patch will allow amdgpu kernel attributes to be applied to CUDA/HIP __global__
functions.
Differential Revision: https://reviews.llvm.org/D47958
llvm-svn: 334561
Diffstat (limited to 'clang/lib/Sema/SemaDeclAttr.cpp')
-rw-r--r-- | clang/lib/Sema/SemaDeclAttr.cpp | 34 |
1 files changed, 18 insertions, 16 deletions
diff --git a/clang/lib/Sema/SemaDeclAttr.cpp b/clang/lib/Sema/SemaDeclAttr.cpp index e4532a7e678..779192b8650 100644 --- a/clang/lib/Sema/SemaDeclAttr.cpp +++ b/clang/lib/Sema/SemaDeclAttr.cpp @@ -6468,25 +6468,27 @@ void Sema::ProcessDeclAttributeList(Scope *S, Decl *D, } else if (const auto *A = D->getAttr<VecTypeHintAttr>()) { Diag(D->getLocation(), diag::err_opencl_kernel_attr) << A; D->setInvalidDecl(); - } else if (const auto *A = D->getAttr<AMDGPUFlatWorkGroupSizeAttr>()) { - Diag(D->getLocation(), diag::err_attribute_wrong_decl_type) - << A << ExpectedKernelFunction; - D->setInvalidDecl(); - } else if (const auto *A = D->getAttr<AMDGPUWavesPerEUAttr>()) { - Diag(D->getLocation(), diag::err_attribute_wrong_decl_type) - << A << ExpectedKernelFunction; - D->setInvalidDecl(); - } else if (const auto *A = D->getAttr<AMDGPUNumSGPRAttr>()) { - Diag(D->getLocation(), diag::err_attribute_wrong_decl_type) - << A << ExpectedKernelFunction; - D->setInvalidDecl(); - } else if (const auto *A = D->getAttr<AMDGPUNumVGPRAttr>()) { - Diag(D->getLocation(), diag::err_attribute_wrong_decl_type) - << A << ExpectedKernelFunction; - D->setInvalidDecl(); } else if (const auto *A = D->getAttr<OpenCLIntelReqdSubGroupSizeAttr>()) { Diag(D->getLocation(), diag::err_opencl_kernel_attr) << A; D->setInvalidDecl(); + } else if (!D->hasAttr<CUDAGlobalAttr>()) { + if (const auto *A = D->getAttr<AMDGPUFlatWorkGroupSizeAttr>()) { + Diag(D->getLocation(), diag::err_attribute_wrong_decl_type) + << A << ExpectedKernelFunction; + D->setInvalidDecl(); + } else if (const auto *A = D->getAttr<AMDGPUWavesPerEUAttr>()) { + Diag(D->getLocation(), diag::err_attribute_wrong_decl_type) + << A << ExpectedKernelFunction; + D->setInvalidDecl(); + } else if (const auto *A = D->getAttr<AMDGPUNumSGPRAttr>()) { + Diag(D->getLocation(), diag::err_attribute_wrong_decl_type) + << A << ExpectedKernelFunction; + D->setInvalidDecl(); + } else if (const auto *A = D->getAttr<AMDGPUNumVGPRAttr>()) { + Diag(D->getLocation(), diag::err_attribute_wrong_decl_type) + << A << ExpectedKernelFunction; + D->setInvalidDecl(); + } } } } |