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| author | Craig Topper <craig.topper@intel.com> | 2018-11-20 21:21:52 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@intel.com> | 2018-11-20 21:21:52 +0000 |
| commit | 24b346da42632fff3fe5d129d5fbdafa834d79a7 (patch) | |
| tree | 3d91fc2d0d980f51980f7492d1dbbad3100fcdd8 /clang/lib/Sema/SemaCodeComplete.cpp | |
| parent | c2b375ad60c5194dac06535d8e98e06a66b5cdf7 (diff) | |
| download | bcm5719-llvm-24b346da42632fff3fe5d129d5fbdafa834d79a7.tar.gz bcm5719-llvm-24b346da42632fff3fe5d129d5fbdafa834d79a7.zip | |
[X86] Emit a single shuffle for the v16i8->v4i32 step of a SIGN_EXTEND_VECTOR_INREG lowering on pre-sse4.1 targets.
Previously we emitted to separate shuffles, one for unpcklbw and one for unpcklwd. Instead emit a single shuffle equivalent to both of the original shuffles. Shuffle lowering seems able to handle it. This avoids a bitcast between the two shuffles which seems helpful to DAG combine.
Remove the custom type legalization for v8i8->v8i32. I had put that in to avoid some almost duplicate punpcklbw instructions I was seeing, but this lowering change seems to fix that. It also fixes some duplicate shuffles seen in vector-sext.ll
llvm-svn: 347348
Diffstat (limited to 'clang/lib/Sema/SemaCodeComplete.cpp')
0 files changed, 0 insertions, 0 deletions
