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| author | Tim Corringham <tcorring@amd.com> | 2018-12-10 12:06:10 +0000 |
|---|---|---|
| committer | Tim Corringham <tcorring@amd.com> | 2018-12-10 12:06:10 +0000 |
| commit | 4c4d2fe280bc8a04598e7e9d75c63fb64ee4cd81 (patch) | |
| tree | 30dc08ac8b95ec64acd2ef885b4b18d0d33ca3ee /clang/lib/Lex/PPDirectives.cpp | |
| parent | a06b163d5cee8114cd34c4565bbf1d5f28554684 (diff) | |
| download | bcm5719-llvm-4c4d2fe280bc8a04598e7e9d75c63fb64ee4cd81.tar.gz bcm5719-llvm-4c4d2fe280bc8a04598e7e9d75c63fb64ee4cd81.zip | |
[AMDGPU] Add new Mode Register pass
A new pass to manage the Mode register.
Currently this just manages the floating point double precision
rounding requirements, but is intended to be easily extended to
encompass all Mode register settings.
The immediate motivation comes from the requirement to use the
round-to-zero rounding mode for the 16 bit interpolation
instructions, where the rounding mode setting is shared between
16 and 64 bit operations.
llvm-svn: 348754
Diffstat (limited to 'clang/lib/Lex/PPDirectives.cpp')
0 files changed, 0 insertions, 0 deletions
