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| author | Craig Topper <craig.topper@intel.com> | 2018-06-30 06:05:17 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@intel.com> | 2018-06-30 06:05:17 +0000 |
| commit | 0029470dde0a93d152dfa6ce3ab19d884decb6a4 (patch) | |
| tree | a97ecacb244c96f0c9d85857eaf5846a277836d2 /clang/lib/Headers/avx512vlintrin.h | |
| parent | eebbfc2809d7d4b96c4c7040450c3171f710d5d6 (diff) | |
| download | bcm5719-llvm-0029470dde0a93d152dfa6ce3ab19d884decb6a4.tar.gz bcm5719-llvm-0029470dde0a93d152dfa6ce3ab19d884decb6a4.zip | |
[X86] Correct the width of mask arguments in intrinsic headers and tests.
All of these found by grepping through IR from the builtin tests for extra trunc and zext/sext instructions that shouldn't have been there.
Some of these were real bugs where we lost bits from the user input:
_mm512_mask_broadcast_f32x8
_mm512_maskz_broadcast_f32x8
_mm512_mask_broadcast_i32x8
_mm512_maskz_broadcast_i32x8
_mm256_mask_cvtusepi16_storeu_epi8
llvm-svn: 336042
Diffstat (limited to 'clang/lib/Headers/avx512vlintrin.h')
| -rw-r--r-- | clang/lib/Headers/avx512vlintrin.h | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/clang/lib/Headers/avx512vlintrin.h b/clang/lib/Headers/avx512vlintrin.h index 0638982ca75..a3bb5898646 100644 --- a/clang/lib/Headers/avx512vlintrin.h +++ b/clang/lib/Headers/avx512vlintrin.h @@ -1849,7 +1849,7 @@ _mm_mask_cvtepi32_ps (__m128 __W, __mmask8 __U, __m128i __A) { } static __inline__ __m128 __DEFAULT_FN_ATTRS -_mm_maskz_cvtepi32_ps (__mmask16 __U, __m128i __A) { +_mm_maskz_cvtepi32_ps (__mmask8 __U, __m128i __A) { return (__m128)__builtin_ia32_selectps_128((__mmask8)__U, (__v4sf)_mm_cvtepi32_ps(__A), (__v4sf)_mm_setzero_ps()); @@ -1863,7 +1863,7 @@ _mm256_mask_cvtepi32_ps (__m256 __W, __mmask8 __U, __m256i __A) { } static __inline__ __m256 __DEFAULT_FN_ATTRS -_mm256_maskz_cvtepi32_ps (__mmask16 __U, __m256i __A) { +_mm256_maskz_cvtepi32_ps (__mmask8 __U, __m256i __A) { return (__m256)__builtin_ia32_selectps_256((__mmask8)__U, (__v8sf)_mm256_cvtepi32_ps(__A), (__v8sf)_mm256_setzero_ps()); @@ -2888,14 +2888,14 @@ _mm_maskz_abs_epi32(__mmask8 __U, __m128i __A) { static __inline__ __m256i __DEFAULT_FN_ATTRS _mm256_mask_abs_epi32(__m256i __W, __mmask8 __U, __m256i __A) { - return (__m256i)__builtin_ia32_selectd_256((__mmask16)__U, + return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U, (__v8si)_mm256_abs_epi32(__A), (__v8si)__W); } static __inline__ __m256i __DEFAULT_FN_ATTRS _mm256_maskz_abs_epi32(__mmask8 __U, __m256i __A) { - return (__m256i)__builtin_ia32_selectd_256((__mmask16)__U, + return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U, (__v8si)_mm256_abs_epi32(__A), (__v8si)_mm256_setzero_si256()); } |
