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| author | Kyrylo Tkachov <kyrylo.tkachov@arm.com> | 2019-07-16 09:27:39 +0000 |
|---|---|---|
| committer | Kyrylo Tkachov <kyrylo.tkachov@arm.com> | 2019-07-16 09:27:39 +0000 |
| commit | eb72138340ce36f3bdd29658eb2ff730cbaa25d7 (patch) | |
| tree | 9f0b4cb65311b729eeb000e06dae408a5ea5fcde /clang/lib/Headers/arm_acle.h | |
| parent | c5a2d7470e10576684bc9a74626d96db8ff069f1 (diff) | |
| download | bcm5719-llvm-eb72138340ce36f3bdd29658eb2ff730cbaa25d7.tar.gz bcm5719-llvm-eb72138340ce36f3bdd29658eb2ff730cbaa25d7.zip | |
[AArch64] Implement __jcvt intrinsic from Armv8.3-A
The jcvt intrinsic defined in ACLE [1] is available when ARM_FEATURE_JCVT is defined.
This change introduces the AArch64 intrinsic, wires it up to the instruction and a new clang builtin function.
The __ARM_FEATURE_JCVT macro is now defined when an Armv8.3-A or higher target is used.
I've implemented the target detection logic in Clang so that this feature is enabled for architectures from armv8.3-a onwards (so -march=armv8.4-a also enables this, for example).
make check-all didn't show any new failures.
[1] https://developer.arm.com/docs/101028/latest/data-processing-intrinsics
Differential Revision: https://reviews.llvm.org/D64495
llvm-svn: 366197
Diffstat (limited to 'clang/lib/Headers/arm_acle.h')
| -rw-r--r-- | clang/lib/Headers/arm_acle.h | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/clang/lib/Headers/arm_acle.h b/clang/lib/Headers/arm_acle.h index 08d65fa0d06..096cc261af2 100644 --- a/clang/lib/Headers/arm_acle.h +++ b/clang/lib/Headers/arm_acle.h @@ -597,6 +597,14 @@ __crc32cd(uint32_t __a, uint64_t __b) { } #endif +/* Armv8.3-A Javascript conversion intrinsic */ +#if __ARM_64BIT_STATE && defined(__ARM_FEATURE_JCVT) +static __inline__ int32_t __attribute__((__always_inline__, __nodebug__)) +__jcvt(double __a) { + return __builtin_arm_jcvt(__a); +} +#endif + /* 10.1 Special register intrinsics */ #define __arm_rsr(sysreg) __builtin_arm_rsr(sysreg) #define __arm_rsr64(sysreg) __builtin_arm_rsr64(sysreg) |
