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author | Nemanja Ivanovic <nemanja.i.ibm@gmail.com> | 2018-10-09 23:20:11 +0000 |
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committer | Nemanja Ivanovic <nemanja.i.ibm@gmail.com> | 2018-10-09 23:20:11 +0000 |
commit | 72d4866e57666057e5d8c3e51065e9f895f37f29 (patch) | |
tree | 361ba4185107856c43c39303a5330939b79e3bd4 /clang/lib/FrontendTool/ExecuteCompilerInvocation.cpp | |
parent | 5c7bf1a75652ef73968b3737d44ea4bd2fe49673 (diff) | |
download | bcm5719-llvm-72d4866e57666057e5d8c3e51065e9f895f37f29.tar.gz bcm5719-llvm-72d4866e57666057e5d8c3e51065e9f895f37f29.zip |
[DAGCombiner] Expand combining of FP logical ops to sign-setting FP ops
We already do the following combines:
(bitcast int (and (bitcast fp X to int), 0x7fff...) to fp) -> fabs X
(bitcast int (xor (bitcast fp X to int), 0x8000...) to fp) -> fneg X
When the target has "bit preserving fp logic". This patch just extends it
to also combine:
(bitcast int (or (bitcast fp X to int), 0x8000...) to fp) -> fneg (fabs X)
As some targets have fnabs and even those that don't can efficiently lower
both the fabs and the fneg.
Differential revision: https://reviews.llvm.org/D44548
llvm-svn: 344093
Diffstat (limited to 'clang/lib/FrontendTool/ExecuteCompilerInvocation.cpp')
0 files changed, 0 insertions, 0 deletions